Datasheet

Processor Integrated I/O (IIO) Configuration Registers
170 Datasheet, Volume 2
3.6.1.13 TXT.SINIT.MEMORY.SIZE—Intel
®
TXT SINIT Memory
Size Register
This register indicates the size of the SINIT memory space.
General Behavioral Rules:
This is a read/write register.
This register is available for read or write in the Private Intel TXT configuration
space.
3.6.1.14 TXT.MLE.JOIN—Intel
®
TXT MLE Join Base Register
Holds a pointer to the base address of the SVMM join code used by the RLPs.
General Behavioral Rules:
This is a read/write register.
This register is available for read or write in the Public Intel TXT configuration
space.
This register is available for read or write in the Private Intel TXT configuration
space.
Base: TXT_TXT Offset: 0278h
Base: TXT_PR Offset: 0278h
Base: TXT_PB Offset: 0278h
Bit Attr Default Description
63:0 RW 0h
TXT.SINIT.SIZE[63:0]
Hardware does not use the information contained in this register. It is used
as a mailbox between two pieces of software.
Base: TXT_TXT Offset: 0290h
Base: TXT_PR Offset: 0290h
Base: TXT_PB Offset: 0290h
Bit Attr Default Description
63:40 RO 0h
Reserved
39:0 RW 0h
TXT.MLE.JOIN[39:0]
Base address of the MLE join code.