Datasheet

Datasheet, Volume 2 147
Processor Integrated I/O (IIO) Configuration Registers
3.5.2.8 FLTSTS[0:1]—Fault Status Register
Register: FLTSTS[0:1]
Addr: MMIO
BAR: VTBAR
Offset: 34h, 1034h
Bit Attr Default Description
31:16 RV 0 Reserved
15:8 ROS 0
Fault Record Index
This field is valid only when the Primary Fault Pending field is set. This
field indicates the index (from base) of the fault recording register to
which the first pending fault was recorded when the Primary Fault
pending field was set by hardware.
7RV 0Reserved
6 RW1CS 0
Invalidation Time-out Error (ITE)
Hardware detected a Device-IOTLB invalidation completion time-out. At
this time, a fault event may be generated based on the programming of
the Fault Event Control register.
5 RW1CS 0
Invalidation Completion Error
Hardware received an unexpected or invalid Device-IOTLB invalidation
completion. At this time, a fault event is generated based on the
programming of the Fault Event Control register.
4 RW1CS 0
Invalidation Queue Error (IQE)
Hardware detected an error associated with the invalidation queue. For
example, hardware detected an erroneous or un-supported Invalidation
Descriptor in the Invalidation Queue. At this time, a fault event is
generated based on the programming of the Fault Event Control register.
3:2 RV 0 Reserved
1ROS 0
Primary Pending Fault (PPF)
This field indicates if there are one or more pending faults logged in the
fault recording registers.
0 = No pending faults in any of the fault recording registers
1 = One or more fault recording registers has pending faults. The fault
recording index field is updated by hardware whenever this field is
set by hardware. Also, depending on the programming of fault
event control register, a fault event is generated when hardware
sets this field.
0 RW1CS 0
Primary Fault Overflow
Hardware sets this bit to indicate overflow of fault recording registers