Datasheet
Processor Integrated I/O (IIO) Configuration Registers
128 Datasheet, Volume 2
3.4.4.33 VTSTS—Intel
®
VT-d Status Register
3.4.5 Semaphore and ScratchPad Registers (Dev:8, F:1)
3.4.5.1 SR[0:3]—Scratch Pad Register 0-3 (Sticky)
3.4.5.2 SR[4:7]—Scratch Pad Register 4-7 (Sticky)
3.4.5.3 SR[8:11]—Scratch Pad Register 8-11 (Non-Sticky)
Register: VTSTS
Device: 8
Function: 0
Offset: 190h
Bit Attr Default Description
31:2 RV 00000000h Reserved
1 RW1CS 0 Interrupt Transaction Seen on VC1/VCp
0 RW1CS 0 Reserved
Register: SR[0:3]
Device: 8
Function: 1
Offset: 07Ch-088h by 4
Bit Attr Default Description
31:0 RWSLB 0h
Scratch Pad — Sticky
Sticky scratch pad registers for firmware utilization.
Register: SR[4:7]
Device: 8
Function: 1
Offset: 08Ch-098h by 4
Bit Attr Default Description
31:0 RWSLB 0h
Scratch Pad — Sticky
Sticky scratch pad registers for firmware utilization.
Register: SR[8:11]
Device: 8
Function: 1
Offset: 09Ch-0A8h by 4
Bit Attr Default Description
31:0 RWLB 0h
Scratch Pad — Non-Sticky
Non-sticky scratch pad registers for firmware utilization.