Datasheet

Package Mechanical Specifications and Pin Information
52 Datasheet
C3 TEST7 Test
C4 IGNNE# CMOS Input
C5 VSS Power/Other
C6 LINT0 CMOS Input
C7
THERMTRIP
#
Open Drain Output
C8 VSS Power/Other
C9 VCC Power/Other
C10 VCC Power/Other
C11 VSS Power/Other
C12 VCC Power/Other
C13 VCC Power/Other
C14 VSS Power/Other
C15 VCC Power/Other
C16 VSS Power/Other
C17 VCC Power/Other
C18 VCC Power/Other
C19 VSS Power/Other
C20 DBR# CMOS Output
C21 BSEL[2] CMOS Output
C22 VSS Power/Other
C23 TEST1 Test
C24 TEST3 Test
C25 VSS Power/Other
C26 VCCA Power/Other
D1 VSS Power/Other
D2 RSVD Reserved
D3 TDO_M Open Drain Output
D4 VSS Power/Other
D5 STPCLK# CMOS Input
D6 PWRGOOD CMOS Input
D7 SLP# CMOS Input
D8 RSVD Reserved
D9 VCC Power/Other
D10 VCC Power/Other
D11 VSS Power/Other
D12 VCC Power/Other
D13 VSS Power/Other
D14 VCC Power/Other
Table 13. Pin Listing by Pin
Number
Pin
#
Pin Name
Signal
Buffer
Type
Direction
D15 VCC Power/Other
D16 VSS Power/Other
D17 VCC Power/Other
D18 VCC Power/Other
D19 VSS Power/Other
D20 IERR# Open Drain Output
D21 PROCHOT# Open Drain
Input/
Output
D22 GTLREF_2 Power/Other Input
D23 VSS Power/Other
D24 DPWR#
Common
Clock
Input/
Output
D25 TEST2 Test
D26 VSS Power/Other
E1 DBSY#
Common
Clock
Input/
Output
E2 BNR#
Common
Clock
Input/
Output
E3 VSS Power/Other
E4 HITM#
Common
Clock
Input/
Output
E5 DPRSTP# CMOS Input
E6 VSS Power/Other
E7 VCC Power/Other
E8 VSS Power/Other
E9 VCC Power/Other
E10 VCC Power/Other
E11 VSS Power/Other
E12 VCC Power/Other
E13 VCC Power/Other
E14 VSS Power/Other
E15 VCC Power/Other
E16 VSS Power/Other
E17 VCC Power/Other
E18 VCC Power/Other
E19 VSS Power/Other
E20 VCC Power/Other
E21 VSS Power/Other
E22 D[0]# Source Synch
Input/
Output
Table 13. Pin Listing by Pin
Number
Pin
#
Pin Name
Signal
Buffer
Type
Direction