Datasheet

Package Mechanical Specifications and Pin Information
Intel
®
Celeron
®
M Processor Datasheet 41
DSTBP[3]# AE25 Source Synch Input/Output
FERR# D3 Open Drain Output
GTLREF AD26 Power/Other Input
HIT# K3 Common Clock Input/Output
HITM# K4 Common Clock Input/Output
IERR# A4 Open Drain Output
IGNNE# A3 CMOS Input
INIT# B5 CMOS Input
ITP_CLK[0] A16 CMOS input
ITP_CLK[1] A15 CMOS input
LINT0 D1 CMOS Input
LINT1 D4 CMOS Input
LOCK# J2 Common Clock Input/Output
PRDY# A10 Common Clock Output
PREQ# B10 Common Clock Input
PROCHOT
#
B17 Open Drain Output
PSI# E1 CMOS Output
PWRGOOD E4 CMOS Input
REQ[0]# R2 Source Synch Input/Output
REQ[1]# P3 Source Synch Input/Output
REQ[2]# T2 Source Synch Input/Output
REQ[3]# P1 Source Synch Input/Output
REQ[4]# T1 Source Synch Input/Output
RESET# B11 Common Clock Input
RS[0]# H1 Common Clock Input
RS[1]# K1 Common Clock Input
RS[2]# L2 Common Clock Input
RSVD AF7 Reserved
RSVD B2 Reserved
RSVD C14 Reserved
RSVD C3 Reserved
Table 23. Pin Listing by Pin Name
Pin Name
Pin
Number
Signal Buffer
Type
Direction
RSVD E26 Reserved
RSVD G1 Reserved
RSVD AC1 Reserved
SLP# A6 CMOS Input
SMI# B4 CMOS Input
STPCLK# C6 CMOS Input
TCK A13 CMOS Input
TDI C12 CMOS Input
TDO A12 Open Drain Output
TEST1 C5 Test
TEST2 F23 Test
TEST3 C16 Test
THERMDA B18 Power/Other
THERMDC A18 Power/Other
THERMTRI
P#
C17 Open Drain Output
TMS C11 CMOS Input
TRDY# M3 Common Clock Input
TRST# B13 CMOS Input
VCC D6 Power/Other
VCC D8 Power/Other
VCC D18 Power/Other
VCC D20 Power/Other
VCC D22 Power/Other
VCC E5 Power/Other
VCC E7 Power/Other
VCC E9 Power/Other
VCC E17 Power/Other
VCC E19 Power/Other
VCC E21 Power/Other
VCC F6 Power/Other
VCC F8 Power/Other
Table 23. Pin Listing by Pin Name
Pin Name
Pin
Number
Signal Buffer
Type
Direction