User Manual

94 Datasheet
Pentium
®
III Processor for the PGA370 Socket at 500 MHz to 1.13 GHz
Table 45. Input/Output Signals (Single Driver)
Name Active Level Clock Signal Group Qualified
A[35:3]# Low BCLK AGTL+ I/O ADS#, ADS#+1
ADS# Low BCLK AGTL+ I/O Always
AP[1:0]# Low BCLK AGTL+ I/O ADS#, ADS#+1
BP[3:2]# Low BCLK AGTL+ I/O Always
BPM[1:0]# Low BCLK AGTL+ I/O Always
BR0# Low BCLK AGTL+ I/O Always
BSEL[1:0] High Asynch Power/Other Always
D[63:0]# Low BCLK AGTL+ I/O DRDY#
DBSY# Low BCLK AGTL+ I/O Always
DEP[7:0]# Low BCLK AGTL+ I/O DRDY#
DRDY# Low BCLK AGTL+ I/O Always
LOCK# Low BCLK AGTL+ I/O Always
REQ[4:0]# Low BCLK AGTL+ I/O ADS#, ADS#+1
RP# Low BCLK AGTL+ I/O ADS#, ADS#+1
Table 46. Input/Output Signals (Multiple Driver)
Name Active Level Clock Signal Group Qualified
AERR# Low BCLK AGTL+ I/O ADS#+3
BERR# Low BCLK AGTL+ I/O Always
BINIT# Low BCLK AGTL+ I/O Always
BNR# Low BCLK AGTL+ I/O Always
HIT# Low BCLK AGTL+ I/O Always
HITM# Low BCLK AGTL+ I/O Always
PICD[1:0] High PICCLK APIC I/O Always