User Manual

34 Datasheet
Pentium
®
III Processor for the PGA370 Socket at 500 MHz to 1.13 GHz
NOTES:
1. Unless otherwise noted, all specifications in this table apply to Pentium III processors at all frequencies.
2. All inputs, outputs, and I/O pins must comply with the signal quality specifications in Section 3.0.
3. Minimum and maximum V
TT are given in Table 12 on page 36.
4. (0 ≤ V
IN ≤ 1.5 V +3%) and (0≤VOUT≤1.5 V+3%).
5. Refer to the processor I/O Buffer Models for I/V characteristics.
6. Steady state input voltage must not be above V
SS + 1.65 V or below VTT -1.65V.
NOTES:
1. Unless otherwise noted, all specifications in this table apply to Pentium III processors at all frequencies.
2. Parameter measured at 9 mA (for use with TTL inputs).
3. (0 ≤ V
IN ≤ 2.5 V +5%).
4. (0 ≤ V
OUT ≤ 2.5 V +5%).
5. For BCLK specifications, refer to Table 24 on page 51.
6. (0 ≤ V
IN ≤ 1.5 V +3%).
7. (0 ≤ V
OUT ≤ 1.5 V +3%).
8. Applies to non-AGTL signals except BCLK, PICCLK, and PWRGOOD.
9. Applies to non-AGTL signals except BCLK, PICCLK, and PWRGOOD.
4.5 21.88
5 22.01
Table 9. AGTL / AGTL+ Signal Groups DC Specifications
1
Symbol Parameter Min Max Unit Notes
V
IL Input Low Voltage –0.150 V
REF
- 0.200 V 6
V
IH Input High Voltage V
REF
+ 0.200 VTT V 2,3,6
Ron Buffer On Resistance 16.67 Ω 5
I
L
Leakage Current for inputs,
outputs, and I/O
±100 µA 4
Table 8. PL Slew Rate Data (23A) (Sheet 2 of 2)
Time (µs) ICC (A)
Table 10. Non-AGTL+ Signal Group DC Specifications
1
Symbol Parameter Min Max Unit Notes
V
IL
1.5
Input Low Voltage -0.150
V
CMOS_REF
-
0.200
V9
V
IL
2.5
Input Low Voltage -0.58 0.700 V 5, 8
V
IH
1.5
Input High Voltage
V
CMOS_REF
+
0.200
1.5 V 6, 9
V
IH
2.5
Input High Voltage 2.000 3.18 V 5, 8
V
OL Output Low Voltage 0.400 V 2
R
on
35 2
V
OH Output High Voltage 1.5 V
7, 9, All outputs are
open-drain
I
OL Output Low Current 9 mA
I
LI Input Leakage Current ±100 µA 3, 6
I
LO Output Leakage Current ±100 µA 4, 7