User Manual

Datasheet 3
Pentium
®
III Processor for the PGA370 Socket at 500 MHz to 1.13 GHz
Contents
1.0 Introduction..................................................................................................................8
1.1 Terminology...........................................................................................................9
1.1.1 Package and Processor Terminology ......................................................9
1.1.2 Processor Naming Convention...............................................................10
1.2 Related Documents.............................................................................................11
2.0 Electrical Specifications........................................................................................13
2.1 Processor System Bus and V
REF
........................................................................13
2.2 Clock Control and Low Power States..................................................................14
2.2.1 Normal State—State 1 ...........................................................................15
2.2.2 AutoHALT Powerdown State—State 2...................................................15
2.2.3 Stop-Grant State—State 3 .....................................................................16
2.2.4 HALT/Grant Snoop State—State 4 ........................................................16
2.2.5 Sleep State—State 5..............................................................................16
2.2.6 Deep Sleep State—State 6 ....................................................................17
2.2.7 Clock Control..........................................................................................17
2.3 Power and Ground Pins ......................................................................................17
2.3.1 Phase Lock Loop (PLL) Power...............................................................18
2.4 Decoupling Guidelines .......................................................................................19
2.4.1 Processor VCC
CORE
and AGTL+ (AGTL) Decoupling ...........................19
2.5 Processor System Bus Clock and Processor Clocking.......................................19
2.5.1 Mixing Processors of Different Frequencies...........................................20
2.6 Voltage Identification...........................................................................................20
2.7 Processor System Bus Unused Pins...................................................................22
2.8 Processor System Bus Signal Groups ................................................................22
2.8.1 Asynchronous vs. Synchronous for System Bus Signals.......................24
2.8.2 System Bus Frequency Select Signals (BSEL[1:0])...............................25
2.9 Maximum Ratings................................................................................................26
2.10 Processor DC Specifications...............................................................................27
2.10.1 ICC Slew Rate Specifications.................................................................33
2.11 AGTL / AGTL+ System Bus Specifications .........................................................36
2.12 System Bus AC Specifications............................................................................37
2.12.1 I/O Buffer Model .....................................................................................37
3.0 Signal Quality Specifications..............................................................................46
3.1 BCLK/BCLK# and PICCLK Signal Quality Specifications and Measurement
Guidelines ...........................................................................................................46
3.2 AGTL+ / AGTL Signal Quality Specifications and Measurement Guidelines ......47
3.3 AGTL+ Signal Quality Specifications and Measurement Guidelines ..................48
3.3.1 Overshoot/Undershoot Guidelines .........................................................48
3.3.2 Overshoot/Undershoot Magnitude .........................................................49
3.3.3 Overshoot/Undershoot Pulse Duration...................................................49
3.3.4 Activity Factor.........................................................................................49
3.3.5 Reading Overshoot/Undershoot Specification Tables............................50
3.3.6 Determining if a System Meets the Overshoot/Undershoot
Specifications .........................................................................................51
3.4 Non-AGTL+ (Non-AGTL) Signal Quality Specifications and Measurement