Datasheet

Product Description
23
1.6 Intel
®
915P Chipset
The Intel 915P chipset consists of the following devices:
•
Intel 82915P Memory Controller Hub (MCH) with Direct Media Interface (DMI) interconnect
•
Intel 82801FR I/O Controller Hub (ICH6-R) with DMI interconnect
•
Firmware Hub (FWH)
The MCH is a centralized controller for the system bus, the memory bus, the PCI Express bus, and
the DMI interconnect. The ICH6-R is a centralized controller for the board’s I/O paths. The FWH
provides the nonvolatile storage of the BIOS.
For information about Refer to
The Intel 915P chipset http://developer.intel.com/
Resources used by the chipset Chapter 2
1.6.1 USB
The board supports up to eight USB 2.0 ports, supports UHCI and EHCI, and uses UHCI- and
EHCI-compatible drivers.
The ICH6-R provides the USB controller for all ports. The port arrangement is as follows:
• Four ports are implemented with dual stacked back panel connectors adjacent to the audio
connectors
• Four ports are routed to two separate front panel USB connectors
✏
NOTE
Computer systems that have an unshielded cable attached to a USB port may not meet FCC
Class B requirements, even if no device is attached to the cable. Use shielded cable that meets the
requirements for full-speed devices.
For information about Refer to
The location of the USB connectors on the back panel Figure 15, page 58
The location of the front panel USB connectors Figure 16, page 60
1.6.2 IDE Support
The board provides five IDE interface connectors:
• One parallel ATA IDE connector that supports two devices
• Four serial ATA IDE connectors that support one device per connector
1.6.2.1 Parallel ATE IDE Interface
The ICH6-R’s Parallel ATA IDE controller has one bus-mastering Parallel ATA IDE interface.
The Parallel ATA IDE interface supports the following modes:
• Programmed I/O (PIO): processor controls data transfer.
• 8237-style DMA: DMA offloads the processor, supporting transfer rates of up to 16 MB/sec.