Datasheet

Intel Desktop Board D2550MUD2 Technical Product Specification
46
Table 13. LVDS Data Connector
Pin
Signal
Name
Description
Pin
Signal
Name
Description
1 LA_CLKN LVDS Channel A diff
clock output -
negative
2 NC
3 LA_CLKP LVDS Channel A diff
clock output -
positive
4 NC
5 EDID_3.3V Power for EDID
ROM
6 EDID_GND Ground for EDID
signaling
7 LA_DATAN0 LVDS Channel A diff
data output –
negative
8 NC
9 LA_DATAP0 LVDS Channel A diff
data output –
positive
10 NC
11 LA_DATAN1 LVDS Channel A diff
data output –
negative
12 NC
13 LA_DATAP1 LVDS Channel A diff
data output –
positive
14 NC
15
GND
Ground
16
GND
Ground
17 LA_DATAN2 LVDS Channel A diff
data output –
negative
18 NC
19 LA_DATAP2 LVDS Channel A diff
data output –
positive
20 NC
21 LA_DATAN3 LVDS Channel A diff
data output –
negative
22 GND Ground
23 LA_DATAP3 LVDS Channel A diff
data output –
positive
24 GND Ground
25 3.3 V/5 V/12 V Selectable LCD
power output
26 3.3 V/5 V/12 V Selectable LCD power
output
27 3.3 V/5 V/12 V Selectable LCD
power output
28 3.3 V/5 V/12 V Selectable LCD power
output
29 EDID_CLK EDID/DDC clock
signal
30 EDID_DATA EDID/DDC data signal