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Table Of Contents
- BCH IP Core: User Guide
- Contents
- 1. About the BCH IP Core
- 2. BCH IP Core Getting Started
- 3. BCH IP Core Functional Description
- 4. Document Revision History
- A. BCH IP Core Document Archive
For decoders:
•
Input: in[0 to data width of data_in]
•
Output: out [0 to data width+number_errors | data_out]
3.4.1. Avalon-ST Interfaces in DSP IP Cores
Avalon-ST interfaces define a standard, flexible, and modular protocol for data
transfers from a source interface to a sink interface.
The input interface is an Avalon-ST sink and the output interface is an Avalon-ST
source. The Avalon-ST interface supports packet transfers with packets interleaved
across multiple channels.
Avalon-ST interface signals can describe traditional streaming interfaces supporting a
single stream of data without knowledge of channels or packet boundaries. Such
interfaces typically contain data, ready, and valid signals. Avalon-ST interfaces can
also support more complex protocols for burst and packet transfers with packets
interleaved across multiple channels. The Avalon-ST interface inherently synchronizes
multichannel designs, which allows you to achieve efficient, time-multiplexed
implementations without having to implement complex control logic.
Avalon-ST interfaces support backpressure, which is a flow control mechanism where
a sink can signal to a source to stop sending data. The sink typically uses
backpressure to stop the flow of data when its FIFO buffers are full or when it has
congestion on its output.
Related Information
Avalon Interface Specifications
3. BCH IP Core Functional Description
683320 | 2017.11.06
BCH IP Core: User Guide
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