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2.3. Generating IP Cores (Intel Quartus Prime Pro Edition)
Quickly configure Intel FPGA IP cores in the Intel Quartus Prime parameter editor.
Double-click any component in the IP Catalog to launch the parameter editor. The
parameter editor allows you to define a custom variation of the IP core. The parameter
editor generates the IP variation synthesis and optional simulation files, and adds
the .ip file representing the variation to your project automatically.
Figure 5. IP Parameter Editor (Intel Quartus Prime Pro Edition)
IP Parameters IP Block Symbol
Follow these steps to locate, instantiate, and customize an IP core in the parameter
editor:
1.
Create or open an Intel Quartus Prime project (.qpf) to contain the instantiated
IP variation.
2.
In the IP Catalog (Tools ➤ IP Catalog), locate and double-click the name of the
IP core to customize. To locate a specific component, type some or all of the
component’s name in the IP Catalog search box. The New IP Variation window
appears.
3. Specify a top-level name for your custom IP variation. Do not include spaces in IP
variation names or paths. The parameter editor saves the IP variation settings in a
file named <your_ip>.ip. Click OK. The parameter editor appears.
4. Set the parameter values in the parameter editor and view the block diagram for
the component. The Parameterization Messages tab at the bottom displays any
errors in IP parameters:
• Optionally, select preset parameter values if provided for your IP core. Presets
specify initial parameter values for specific applications.
• Specify parameters defining the IP core functionality, port configurations, and
device-specific features.
• Specify options for processing the IP core files in other EDA tools.
2. BCH IP Core Getting Started
683320 | 2017.11.06
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BCH IP Core: User Guide
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