Datasheet

Processor Configuration Registers
98 Datasheet, Volume 2
2.8.44 TSTTPB1—Thermal Sensor Temperature Trip Point B1
Register
This register sets the target values for some of the trip points in the Thermometer
mode. See also TSTTPA1.
2.8.45 TS10BITMCTRL—Thermal Sensor 10-bit Mode Control
Register
B/D/F/Type: 0/0/0/MCHBAR
Address Offset: 1014–1017h
Reset Value: 0000_0000h
Access: RW-L
Bit Attr
Reset
Value
Description
31:24 RW-L 00h
Aux 3 Trip Point Setting (A3TPS)
Sets the target value for the Aux3 trip point Lockable by TSTTPA1[31].
23:16 RW-L 00h
Aux 2 Trip Point Setting (A2TPS)
Sets the target value for the Aux2 trip point Lockable by TSTTPA1[31].
15:8 RW-L 00h
Aux 1 Trip Point Setting (A1TPS)
Sets the target value for the Aux1 trip point Lockable by TSTTPA1[31].
7:0 RW-L 00h
Aux 0 Trip Point Setting (A0TPS)
Sets the target value for the Aux0 trip point Lockable by TSTTPA1[31].
B/D/F/Type: 0/0/0/MCHBAR
Address Offset: 1018–1019h
Reset Value: 0000h
Access: RW-L
BIOS Optimal Reset Value 00h
Bit Attr
Reset
Value
Description
15 RW-L 0b
Thermal Sensor 10-bit Mode Enable (TS10BITEN)
0 = Normal operation (DTS 8-bit mode)
1 = DTS is operating in 10-bit mode. ROTS10BIT calculation is applied to
TR1.
Locked by LBC.
14:10 RO 0h Reserved
9:0 RW-L 000h
Relative Offset when Thermal Sensor is Operating in 10-bit Mode
(ROTS10BIT)
Software needs to program this field such that the following equation is
ensured to yield an 8-bit value.
TR = ROTS10BIT - Raw Temp Code from DTS
TR[9:8] should always be 0.
TR[7:0] is reported in the TR1 register.
Locked by LBC.