Datasheet

Datasheet, Volume 2 97

Processor Configuration Registers

2.8.43 TSTTPA1—Thermal Sensor Temperature Trip Point A1

This register sets the target values for some of the trip points in thermometer mode.

See also TST [Direct DAC Connect Test Enable]. This register also reports the relative

thermal sensor temperature. See also TSTTPB.

B/D/F/Type: 0/0/0/MCHBAR

Address Offset: 1010–1013h

Reset Value: 0000_0000h

Access: RW-L, RO

Bit Attr

Reset

Value

Description

31 RW-L 0b

Lock Bit for Aux0, Aux1, Aux2 and Aux3 Trip points (AUXLOCK)

This bit, when written to a 1, locks the Aux x Trip point settings.

This lock is reversible. The reversing procedure is the following sequence,

which must be done in order, without any other configuration cycles in-

between.

write testtpa1 04C1C202

write testtpa1 04C15202

write testtpa1 04C1C202

It is expected that the Aux x Trip point settings can be changed dynamically

when this lock is not set.

30 RW-L 0b

Lock Bit for Catastrophic (LBC)

This bit, when written to a 1, locks the Catastrophic programming interface,

including bits 7:0 of TSTTPA[15-0], bits 15 and 9 of TSC, and bits 10 and 8 of

TST1. This bit may only be set to a 0 by a hardware reset. Writing a 0 to this

bit has no effect.

29:16 RO 0000h Reserved

15:8 RW-L 00h

Hot Trip Point Setting (HTPS)

Sets the target value for the Hot trip point. Lockable using TSTTPA1 bit 30.

7:0 RW-L 00h

Catastrophic Trip Point Setting (CTPS)

This field sets the target for the Catastrophic trip point. See TST [Direct DAC

Connect Test Enable]. Lockable using TSTTPA1 bit 30.