Datasheet

Datasheet, Volume 2 61
Processor Configuration Registers
2.7.22 PBFC—Primary Buffer Flush Control Register
2.7.23 SBFC—Secondary Buffer Flush Control Register
B/D/F/Type: 0/0/0/PCI
Address Offset: C0–C3h
Reset Value: 0000_0000h
Access: RO, W
Bit Attr
Reset
Value
Description
31:1 RO 0h Reserved
0W 0b
Primary CWB Flush Control (PCWBFLSH)
A processor write to this bit flushes the PCWB of all writes.
The data associated with the write to this register is discarded.
B/D/F/Type: 0/0/0/PCI
Address Offset: C4–C7h
Reset Value: 0000_0000h
Access: RO, W
Bit Attr
Reset
Value
Description
31:1 RO 0h Reserved
0W 0b
Secondary CWB Flush Control (SCWBFLSH)
A processor write to this bit flushes the SCWB of all writes.
The data associated with the write to this register is discarded.