Datasheet
Datasheet, Volume 2 321
Processor Configuration Registers
5RO 0b
Reserved for Hot-plug Surprise (HPS)
When set to 1, this bit indicates that an adapter present in this slot might be
removed from the system without any prior notification. This is a form factor
specific capability. This bit is an indication to the operating system to allow
for such removal without impacting continued software operation.
4RO 0b
Reserved for Power Indicator Present (PIP)
When set to 1, this bit indicates that a Power Indicator is electrically
controlled by the chassis for this slot.
3RO 0b
Reserved for Attention Indicator Present (AIP)
When set to 1, this bit indicates that an Attention Indicator is electrically
controlled by the chassis.
2RO 0b
Reserved for MRL Sensor Present (MSP)
When set to 1, this bit indicates that an MRL Sensor is implemented on the
chassis for this slot.
1RO 0b
Reserved for Power Controller Present (PCP)
When set to 1, this bit indicates that a software programmable Power
Controller is implemented for this slot/adapter (depending on form factor).
0RO 0b
Reserved for Attention Button Present (ABP)
When set to 1, this bit indicates that an Attention Button for this slot is
electrically controlled by the chassis.
B/D/F/Type: 0/6/0/PCI
Address Offset: B4–B7h
Reset Value: 00040000h
Access: RW-O, RO
Bit Attr
Reset
Value
Description