Datasheet
Datasheet, Volume 2 273
Processor Configuration Registers
2.18.14 PMEN_REG—Protected Memory Enable Register
This register enables the DMA-protected memory regions set up through the PLMBASE,
PLMLIMT, PHMBASE, PHMLIMIT registers. This register is always treated as RO (0) for
implementations not supporting protected memory regions (PLMR and PHMR fields
reported as 0 in the Capability register).
Protected memory regions may be used by software to securely initialize remapping
structures in memory.
B/D/F/Type: 0/2/0/GFXVTBAR
Address Offset: 64–67h
Reset Value: 00000000h
Access: RW, RO
Bit Attr
Reset
Value
Description
31 RW 0b
Enable Protected Memory Region (EPM)
This field controls DMA accesses to the protected low-memory and protected
high memory regions.
0 = DMA accesses to protected memory regions are handled as follows:
— If DMA remapping is not enabled, DMA requests (including those to
protected regions) are not blocked.
— If DMA remapping is enabled, DMA requests are translated per the
programming of the DMA remapping structures. Software may
program the DMA-remapping structures to allow or block DMA to
the protected memory regions.
1 = DMA accesses to protected memory regions are handled as follows:
— If DMA remapping is not enabled, DMA requests to protected
memory regions are blocked. These DMA requests are not
recorded or reported as DMA-remapping faults.
— If DMA remapping is enabled, hardware may or may not block DMA
to the protected memory region(s). Software must not depend on
hardware protection of the protected memory regions, and must
ensure the DMA-remapping structures are properly programmed to
not allow DMA to the protected memory regions.
Hardware reports the status of the protected memory enable/disable
operation through the PRS field in this register. Hardware implementations
supporting DMA draining must drain any in-flight translated DMA requests
queued within the Root-Complex before indicating the protected memory
region as enabled through the PRS field.
30:1 RO 00..00b Reserved
0RO 0b
Protected Region Status (PRS)
This field indicates the status of protected memory region(s):
0 = Protected memory region(s) disabled.
1 = Protected memory region(s) enabled.