Datasheet

Processor Configuration Registers
250 Datasheet, Volume 2
59:57 RO 000b
IOTLB Actual Invalidation Granularity (IAIG)
Hardware reports the granularity at which an invalidation request was
processed through this field at the time of reporting invalidation completion
(by clearing the IVT field).
The following are the encodings for the IAIG field.
000 = Reserved. This indicates hardware detected an incorrect invalidation
request and ignored the request. Examples of incorrect invalidation
requests include detecting an unsupported address mask value in
Invalidate Address register for page-selective invalidation requests.
001 = Global Invalidation performed. This could be in response to a global,
domain-selective, or page-selective invalidation request.
010 = Domain-selective invalidation performed using the domain-id specified
by software in the DID field. This could be in response to a domain-
selective or page-selective invalidation request.
011 = Domain-page-selective invalidation performed using the address,
mask and hint specified by software in the Invalidate Address register
and domain-id specified in DID field. This can be in response to a
domain-page-selective invalidation request.
100–111 = Reserved.
56:50 RO 00h Reserved
49 RW 0b
Drain Reads (DR)
This field is ignored by hardware if the DRD field is reported as clear in the
Capability register.
When DRD field is reported as set in the Capability register, the following
encodings are supported for this field:
0 = Hardware may complete the IOTLB invalidation without draining any
translated DMA reads that are queued in the root-complex and yet to be
processed.
1 = Hardware must drain all/relevant translated DMA reads that are queued
in the root-complex before indicating IOTLB invalidation completion to
software.
Refer to the VTd specification for description of DMA draining.
48 RW 0b
Drain Writes (DW)
This field is ignored by hardware if the DWD field is reported as clear in the
Capability register.
When DWD field is reported as set in the Capability register, the following
encodings are supported for this field:
0 = Hardware may complete the IOTLB invalidation without draining any
translated DMA writes that are queued in the root-complex for
processing.
1 = Hardware must drain all/relevant translated DMA writes that are queued
in the root-complex before indicating IOTLB invalidation completion to
software.
Refer to the VTd specification for description of DMA draining.
47:32 RW 0000h
Domain-ID (DID)
Indicates the ID of the domain whose IOTLB entries need to be selectively
invalidated. This field must be programmed by software for domain-selective
and domain-page-selective invalidation requests.
The Capability register reports the domain-id width supported by hardware.
Software must ensure that the value written to this field is within this limit.
Hardware may ignore and not implement bits 47:(32+N) where N is the
supported domain-id width reported in the capability register.
31:0 RO
0000_000
0h
Reserved
B/D/F/Type: 0/0/0/DMIVC1REMAP
Address Offset: 108–10Fh
Reset Value: 0000000000000000h
Access: RO, RW, RW-SC
Bit Attr
Reset
Value
Description