Datasheet
Datasheet, Volume 2 249
Processor Configuration Registers
2.16.29 IOTLB_REG—IOTLB Invalidate Register
This register is used to invalidate IOTLB. The act of writing the upper byte of the
IOTLB_REG with IVT field set causes the hardware to perform the IOTLB invalidation.
B/D/F/Type: 0/0/0/DMIVC1REMAP
Address Offset: 108–10Fh
Reset Value: 0000000000000000h
Access: RO, RW, RW-SC
Bit Attr
Reset
Value
Description
63 RW-SC 0b
Invalidate IOTLB (IVT)
Software requests IOTLB invalidation by setting this field.
Software must also set the requested invalidation granularity by
programming the IIRG field.
Hardware clears the IVT field to indicate the invalidation request is complete.
Hardware also indicates the granularity at which the invalidation operation
was performed through the IAIG field. Software must not submit another
invalidation request through this register while the IVT field is set, nor update
the associated Invalidate Address register.
Software must not submit IOTLB invalidation requests when there is a
context-cache invalidation request pending at this DMA-remapping hardware
unit.
Refer to the VTd specification for software programming requirements.
Hardware implementations reporting write-buffer flushing requirement
(RWBF=1 in Capability register) must implicitly perform a write buffer flush
before invalidating the IOTLB.
Refer to the VTd specification for write buffer flushing requirements.
62:60 RW 000b
IOTLB Invalidation Request Granularity (IIRG)
When requesting hardware to invalidate the IOTLB (by setting the IVT field),
software writes the requested invalidation granularity through this IIRG field.
Following are the encodings for the IIRG field.
000 = Reserved.
001 = Global invalidation request.
010 = Domain-selective invalidation request. The target domain-id must be
specified in the DID field.
011 = Domain-page-selective invalidation request. The target address, mask
and invalidation hint must be specified in the Invalidate Address
register, and the domain-id must be provided in the DID field.
100 – 111 = Reserved.
Hardware implementations may process an invalidation request by
performing invalidation at a coarser granularity than requested. Hardware
indicates completion of the invalidation request by clearing the IVT field. At
this time, the granularity at which actual invalidation was performed is
reported through the IAIG field.