Datasheet

Datasheet, Volume 2 159
Processor Configuration Registers
2.11.6 VC0RSTS—VC0 Resource Status Register
This register reports the Virtual Channel specific status.
15:8 RO 00h Reserved
7:1 RW 7Fh
TC/VC0 Map (TCVC0M)
This field indicates the TCs (Traffic Classes) that are mapped to the VC
resource. Bit locations within this field correspond to TC values. For example,
when bit 7 is set in this field, TC7 is mapped to this VC resource. When more
than one bit in this field is set, it indicates that multiple TCs are mapped to
the VC resource. In order to remove one or more TCs from the TC/VC Map of
an enabled VC, software must ensure that no new or outstanding
transactions with the TC labels are targeted at the given Link.
0RO 1b
TC0/VC0 Map (TC0VC0M)
Traffic Class 0 is always routed to VC0.
B/D/F/Type: 0/1/0/MMR
Address Offset: 114–117h
Reset Value: 8000_00FFh
Access: RO, RW
Bit Attr
Reset
Value
Description
B/D/F/Type: 0/1/0/MMR
Address Offset: 11A–11Bh
Reset Value: 0002h
Access: RO
Bit Attr
Reset
Value
Description
15:2 RO 0000h Reserved and Zero
1RO 1b
VC0 Negotiation Pending (VC0NP)
0 = The VC negotiation is complete.
1 = The VC resource is still in the process of negotiation (initialization or
disabling).
This bit indicates the status of the process of Flow Control initialization. It is
set by default on Reset, as well as whenever the corresponding Virtual
Channel is Disabled or the Link is in the DL_Down state. It is cleared when
the link successfully exits the FC_INIT2 state.
Before using a Virtual Channel, software must check whether the VC
Negotiation Pending fields for that Virtual Channel are cleared in both
Components on a Link.
0RO 0bReserved for Port Arbitration Table Status