Datasheet
Processor Configuration Registers
154 Datasheet, Volume 2
2.10.46 RSTS—Root Status Register
This register provides information about PCI Express Root Complex specific
parameters.
2.10.47 LCTL2—Link Control 2 Register
B/D/F/Type: 0/1/0/PCI
Address Offset: C0–C3h
Reset Value: 0000_0000h
Access: RO, RW1C
Bit Attr
Reset
Value
Description
31:18 RO 0000h
Reserved and Zero: Reserved for future R/WC/S implementations; software
must use 0 for writes to bits.
17 RO 0b
PME Pending (PMEP)
Indicates that another PME is pending when the PME Status bit is set. When
the PME Status bit is cleared by software; the PME is delivered by hardware
by setting the PME Status bit again and updating the Requestor ID
appropriately. The PME pending bit is cleared by hardware if no more PMEs
are pending.
16 RW1C 0b
PME Status (PMES)
Indicates that PME was asserted by the requestor ID indicated in the PME
Requestor ID field. Subsequent PMEs are kept pending until the status
register is cleared by writing a 1 to this field.
15:0 RO 0000h
PME Requestor ID (PMERID)
Indicates the PCI requestor ID of the last PME requestor.
B/D/F/Type: 0/1/0/PCI
Address Offset: D0–D1h
Reset Value: 0002h
Access: RO, RW-S
Bit Attr
Reset
Value
Description
15:13 RO 000 Reserved
12 RW-S 0b
Compliance De-emphasis (ComplianceDeemphasis)
This bit sets the de-emphasis level in Polling.Compliance state if the entry
occurred due to the Enter Compliance bit being 1b.
1 = 3.5 dB
0 = 6 dB
When the link is operating at 2.5 GT/s, the setting of this bit has no effect.
Components that support only 2.5 GT/s speed are permitted to hardwire this
bit to 0b. For a multi-function device associated with an upstream port,the bit
in Function 0 is of type RWS, and only Function 0 controls the component’s
link behavior. In all other functions of that device, this bit is of type RsvdP.
The default value of this bit is 0b. This bit is intended for debug, compliance
testing purposes. System firmware and software are allowed to modify this
bit only during debug or compliance testing.
11:0 RO 002h Reserved