Datasheet
Processor Configuration Registers
148 Datasheet, Volume 2
2.10.42 SLOTCAP—Slot Capabilities Register
Note: Hot Plug is not supported on the platform.
B/D/F/Type: 0/1/0/PCI
Address Offset: B4–B7h
Reset Value: 00040000h
Access: RW-O, RO
Bit Attr
Reset
Value
Description
31:19 RW-O 0000h
Physical Slot Number (PSN)
Indicates the physical slot number attached to this Port.
BIOS Requirement: This field must be initialized by BIOS to a value that
assigns a slot number that is globally unique within the chassis.
18 RW-O 1b
No Command Completed Support (NCCS)
When set to 1b, this bit indicates that this slot does not generate software
notification when an issued command is completed by the Hot-Plug
Controller. This bit is only permitted to be set to 1b if the hotplug capable
port is able to accept writes to all fields of the Slot Control register without
delay between successive writes.
17 RO 0b
Reserved for Electromechanical Interlock Present (EIP)
When set to 1b, this bit indicates that an Electromechanical Interlock is
implemented on the chassis for this slot.
16:15 RW-O 00b
Slot Power Limit Scale (SPLS)
Specifies the scale used for the Slot Power Limit Value.
00 = 1.0x
01 = 0.1x
10 = 0.01x
11 = 0.001x
If this field is written, the link sends a Set_Slot_Power_Limit message.
14:7 RW-O 00h
Slot Power Limit Value (SPLV)
In combination with the Slot Power Limit Scale value, specifies the upper
limit on power supplied by slot. Power limit (in Watts) is calculated by
multiplying the value in this field by the value in the Slot Power Limit Scale
field.
If this field is written, the link sends a Set_Slot_Power_Limit message.
6RO 0b
Reserved for Hot-plug Capable (HPC)
When set to 1b, this bit indicates that this slot is capable of supporting hot-
lug operations.
5RO 0b
Reserved for Hot-plug Surprise (HPS)
When set to 1b, this bit indicates that an adapter present in this slot might be
removed from the system without any prior notification. This is a form factor
specific capability. This bit is an indication to the operating system to allow
for such removal without impacting continued software operation.
4RO 0b
Reserved for Power Indicator Present (PIP)
When set to 1b, this bit indicates that a Power Indicator is electrically
controlled by the chassis for this slot.
3RO 0b
Reserved for Attention Indicator Present (AIP)
When set to 1b, this bit indicates that an Attention Indicator is electrically
controlled by the chassis.
2RO 0b
Reserved for MRL Sensor Present (MSP)
When set to 1b, this bit indicates that an MRL Sensor is implemented on the
chassis for this slot.
1RO 0b
Reserved for Power Controller Present (PCP)
When set to 1b, this bit indicates that a software programmable Power
Controller is implemented for this slot/adapter (depending on form factor).
0RO 0b
Reserved for Attention Button Present (ABP)
When set to 1b, this bit indicates that an Attention Button for this slot is
electrically controlled by the chassis.