Datasheet
Processor Configuration Registers
120 Datasheet, Volume 2
2.10.5 RID1—Revision Identification Register
This register contains the revision number of the processor device 1. These bits are
read only and writes to this register have no effect.
This register contains the revision number of the processor. The Revision ID (RID) is a
traditional 8-bit Read Only (RO) register located at offset 08h in the standard PCI
header of every PCI/PCI Express compatible device and function.
2.10.6 CC1—Class Code Register
This register identifies the basic function of the device, a more specific sub-class, and a
register- specific programming interface.
B/D/F/Type: 0/1/0/PCI
Address Offset: 8h
Reset Value: 08h
Access: RO
Bit Attr
Reset
Value
Description
7:0 RO 08h
Revision Identification Number (RID1)
This is an 8-bit value that indicates the revision identification number for the
processor Device 0. Refer to the Intel
®
Core™ i5-600 and i3-500 Desktop
Processor Series and Intel
®
Pentium
®
Desktop Processor 6000 Series
Speci
fication Update for the value of the Revision ID Register.
B/D/F/Type: 0/1/0/PCI
Address Offset: 9–Bh
Reset Value: 060400h
Access: RO
Bit Attr
Reset
Value
Description
23:16 RO 06h
Base Class Code (BCC)
Indicates the base class code for this device. This code has the value 06h,
indicating a Bridge device.
15:8 RO 04h
Sub-Class Code (SUBCC)
Indicates the sub-class code for this device. The code is 04h indicating a PCI
to PCI Bridge.
7:0 RO 00h
Programming Interface (PI)
Indicates the programming interface of this device. This value does not
specify a particular register set layout and provides no practical use for this
device.