Datasheet

Processor Configuration Registers
116 Datasheet, Volume 2
A8–A9h DCTL Device Control 0000h RO, RW
AA–ABh DSTS Device Status 0000h RO, RW1C
AC–AFh LCAP Link Capabilities 02214D02h RO, RW-O
B0–B1h LCTL
Link Control
0000h
RO, RW,
RW-SC
B2–B3h LSTS Link Status 1000h RW1C, RO
B4–B7h SLOTCAP Slot Capabilities 00040000h RW-O, RO
B8–B9h SLOTCTL Slot Control 0000h RO, RW
BA–BBh SLOTSTS Slot Status 0000h RO, RW1C
BC–BDh RCTL Root Control 0000h RW, RO
BE–BFh RSVD Reserved 0h RO
C0–C3h RSTS Root Status 0000_0000h RO, RW1C
D0–D1h LCTL2
Link Control 2
0002h
RO, RW-S,
RW
D2–D3h LSTS2 Link Status 2 0000h RO
EC–EFh PEGLC PCI Express-G Legacy Control 0000_0000h RO, RW
Table 2-7. PCI Express* Device 1 Register Address Map
Address
Offset
Register
Symbol
Register Name
Reset
Value
Access