Datasheet

Datasheet, Volume 2 103
Processor Configuration Registers
2.8.49 TERRCMD—Thermal Error Command Register
This register select which errors are generate a SERR DMI interface special cycle, as
enabled by ERRCMD [SERR Thermal Sensor event]. The SERR and SCI must not be
enabled at the same time for the thermal sensor event.
B/D/F/Type: 0/0/0/MCHBAR
Address Offset: 10E4h
Reset Value: 00h
Access: RO, RW
Bit Attr
Reset
Value
Description
7:6 RO 00b Reserved
5RW 0b
SERR on Catastrophic Thermal Sensor Event (CATSERR)
1 = Does not mask the generation of a SERR DMI cycle on a catastrophic
thermal sensor trip.
0 = Disable. Reporting of this condition using SERR messaging is disabled.
4RW 0b
SERR on Hot Thermal Sensor Event (HOTSERR)
1 = Do not mask the generation of a SERR DMI cycle on a Hot thermal
sensor trip.
0 = Disable. Reporting of this condition using SERR messaging is disabled.
3RW 0b
SERR on Aux 3 Thermal Sensor Event (AUX3SERR)
1 = Do not mask the generation of a SERR DMI cycle on a Aux3 thermal
sensor trip
0 = Disable. Reporting of this condition using SERR messaging is disabled.
2RW 0b
SERR on Aux 2 Thermal Sensor Event (AUX2SERR)
1 = Do not mask the generation of a SERR DMI cycle on a Aux2 thermal
sensor trip
0 = Disable. Reporting of this condition using SERR messaging is disabled.
1RW 0b
SERR on Aux 1 Thermal Sensor Event (AUX1SERR)
1 = Do not mask the generation of a SERR DMI cycle on a Aux1 thermal
sensor trip
0 = Disable. Reporting of this condition using SERR messaging is disabled.
0RW 0b
SERR on Aux 0 Thermal Sensor Event (AUX0SERR)
1 = Do not mask the generation of a SERR DMI cycle on a Aux0 thermal
sensor trip
0 = Disable. Reporting of this condition using SERR messaging is disabled.