Datasheet
Pin Lists and Signal Descriptions
54 Intel
®
Pentium
®
4 Processor on 0.13 Micron Process Datasheet
AF22 BCLK[0] Bus Clock Input
AF23 BCLK[1] Bus Clock Input
AF24 RESERVED
AF25 RESERVED
AF26 SKTOCC# Power/Other Output
B2 IGNNE# Asynch GTL+ Input
B3 THERMDA Power/Other
B4 VSS Power/Other
B5 SMI# Asynch GTL+ Input
B6 FERR# Asynch AGL+ Output
B7 VCC Power/Other
B8 VSS Power/Other
B9 VCC Power/Other
B10 VSS Power/Other
B11 VCC Power/Other
B12 VSS Power/Other
B13 VCC Power/Other
B14 VSS Power/Other
B15 VCC Power/Other
B16 VSS Power/Other
B17 VCC Power/Other
B18 VSS Power/Other
B19 VCC Power/Other
B20 VSS Power/Other
B21 D0# Source Synch Input/Output
B22 D01# Source Synch Input/Output
B23 VSS Power/Other
B24 D6# Source Synch Input/Output
B25 D9# Source Synch Input/Output
B26 VSS Power/Other
C1 TDI TAP Input
C2 VSS Power/Other
C3 PROCHOT# Asynch GTL+ Input/Output
C4 THERMDC Power/Other
C5 VSS Power/Other
C6 A20M# Asynch GTL+ Input
C7 VSS Power/Other
C8 VCC Power/Other
C9 VSS Power/Other
C10 VCC Power/Other
C11 VSS Power/Other
C12 VCC Power/Other
C13 VSS Power/Other
C14 VCC Power/Other
Table 4-2. Pin Listing by Pin Number
Pin
Number
Pin Name
Signal Buffer
Type
Direction
C15 VSS Power/Other
C16 VCC Power/Other
C17 VSS Power/Other
C18 VCC Power/Other
C19 VSS Power/Other
C20 VCC Power/Other
C21 D4# Source Synch Input/Output
C22 VSS Power/Other
C23 D7# Source Synch Input/Output
C24 D8# Source Synch Input/Output
C25 VSS Power/Other
C26 D12# Source Synch Input/Output
D1 LINT0 Asynch GTL+ Input
D2 BPRI# Common Clock Input
D3 VSS Power/Other
D4 TCK TAP Input
D5 TDO TAP Output
D6 VSS Power/Other
D7 VCC Power/Other
D8 VSS Power/Other
D9 VCC Power/Other
D10 VSS Power/Other
D11 VCC Power/Other
D12 VSS Power/Other
D13 VCC Power/Other
D14 VSS Power/Other
D15 VCC Power/Other
D16 VSS Power/Other
D17 VCC Power/Other
D18 VSS Power/Other
D19 VCC Power/Other
D20 VSS Power/Other
D21 VSS Power/Other
D22 D5# Source Synch Input/Output
D23 D13# Source Synch Input/Output
D24 VSS Power/Other
D25 D15# Source Synch Input/Output
D26 D23# Source Synch Input/Output
E1 VSS Power/Other
E2 DEFER# Common Clock Input
E3 HITM# Common Clock Input/Output
E4 VSS Power/Other
E5 LINT1 Asynch GTL+ Input
E6 TRST# TAP Input
Table 4-2. Pin Listing by Pin Number
Pin
Number
Pin Name
Signal Buffer
Type
Direction