Datasheet

Signal Description
Intel
®
Xeon
®
and Intel
®
Core™ Processors For Communications Infrastructure
May 2012 Datasheet - Volume 1 of 2
Document Number: 327405
-001 77
8.8 Error and Thermal Protection
Table 8-10. Error and Thermal Protection
Signal Name Description
Direction/Buffer
Type
CATERR#
Catastrophic Error: This signal indicates that the
system has experienced a catastrophic error and
cannot continue to operate. The processor sets this
for non-recoverable machine check errors or other
unrecoverable internal errors. External agents are
allowed to assert this pin which causes the
processor to take a machine check exception.
On this processor, CATERR# is used for signaling
the following types of errors:
• Legacy MCERR’s, CATERR# is asserted for 16
BCLKs.
• Legacy IERR’s, CATERR# remains asserted
until warm or cold reset.
O
CMOS
PECI
PECI (Platform Environment Control
Interface): A serial sideband interface to the
processor, it is used primarily for thermal, power,
and error management.
I/O
Asynchronous
PROCHOT#
Processor Hot: PROCHOT# goes active when the
processor temperature monitoring sensor(s)
detects that the processor has reached its
maximum safe operating temperature. This
indicates that the processor Thermal Control Circuit
(TCC) has been activated, if enabled. This signal
can also be driven to the processor to activate the
TCC.
CMOS Input/
Open-Drain Output
THERMTRIP#
Thermal Trip: The processor protects itself from
catastrophic overheating by use of an internal
thermal sensor. This sensor is set well above the
normal operating temperature to ensure that there
are no false trips. The processor stops all execution
when the junction temperature exceeds
approximately 130°C. This is signaled to the
system by the THERMTRIP# pin. See the
appropriate platform design guide for termination
requirements.
O
Asynchronous CMOS