Datasheet

Thermal Management
Intel
®
Xeon
®
and Intel
®
Core™ Processors For Communications Infrastructure
May 2012 Datasheet - Volume 1 of 2
Document Number: 327405
-001 69
The PECI physical layer is a self-clocked one-wire bus that begins each bit with a
driven, rising edge from an idle level near zero volts. The duration of the signal driven
high depends on whether the bit value is a Logic 0 or Logic 1. PECI also includes
variable data transfer rate established with every message. The single wire interface
provides low board routing overhead for the multiple load connections in the congested
routing area near the processor and chipset components. Bus speed, error checking,
and low protocol overhead provides adequate link bandwidth and reliability to transfer
critical device operating conditions and configuration information.
7.3.4.1 Fan Speed Control with Digital Thermal Sensor
Digital Thermal Sensor based fan speed control (T
FAN
) is a recommended feature to
achieve optimal thermal performance. At the T
FAN
temperature, Intel recommends full
cooling capability well before the DTS reading reaches TJ-MAX. An example of this
would be T
FAN
= T
J, Max
- 10ºC.
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