Datasheet
Intel
®
Xeon
®
and Intel
®
Core™ Processors For Communications Infrastructure
May 2012 Datasheet - Volume 1 of 2
Document Number: 327405-001 5
Contents
4.1.4 Intel
®
VT-d Features ..............................................................................40
4.1.5 Intel
®
VT-d Features Not Supported .........................................................41
4.2 Intel
®
Hyper-Threading Technology.....................................................................41
4.3 Intel
®
Advanced Vector Extensions (Intel
®
AVX)...................................................41
4.4 Intel
®
Advanced Encryption Standard New Instructions (Intel
®
AES-NI)...................42
4.4.1 PCLMULQDQ Instruction..........................................................................42
4.5 Intel
®
64 Architecture x2APIC.............................................................................42
5.0 Processor SKUs .......................................................................................................45
5.1 Overview .........................................................................................................45
5.1.1 SKU Features.........................................................................................45
6.0 Power Management.................................................................................................47
6.1 ACPI States Supported.......................................................................................48
6.1.1 System States .......................................................................................48
6.1.2 Processor Core/Package Idle States..........................................................48
6.1.3 Integrated Memory Controller States ........................................................48
6.1.4 PCIe* Link States...................................................................................49
6.1.5 DMI States............................................................................................49
6.1.6 Interface State Combinations...................................................................49
6.2 Processor Core Power Management......................................................................49
6.2.1 Enhanced Intel SpeedStep® Technology ...................................................50
6.2.2 Low-Power Idle States ............................................................................50
6.2.3 Requesting Low-Power Idle States............................................................51
6.2.4 Core C-states ........................................................................................52
6.2.5 Package C-States...................................................................................53
6.3 IMC Power Management.....................................................................................57
6.3.1 Disabling Unused System Memory Outputs ................................................57
6.3.2 DRAM Power Management and Initialization...............................................57
6.4 PCIe* Power Management..................................................................................59
6.5 DMI Power Management.....................................................................................59
6.6 Thermal Power Management...............................................................................59
7.0 Thermal Management..............................................................................................61
7.1 Thermal Design Power (TDP) and
Junction Temperature (TJ)..................................................................................61
7.2 Thermal and Power Specifications........................................................................61
7.3 Thermal Management Features ...........................................................................63
7.3.1 Processor Package Thermal Features.........................................................63
7.3.2 Processor Core Specific Thermal Features..................................................68
7.3.3 Memory Controller Specific Thermal Features.............................................68
7.3.4 Platform Environment Control Interface (PECI)...........................................69
8.0 Signal Description ...................................................................................................71
8.1 System Memory Interface ..................................................................................71
8.2 Memory Reference and Compensation..................................................................74
8.3 Reset and Miscellaneous Signals..........................................................................74
8.4 PCI Express* Based Interface Signals...................................................................75
8.5 DMI.................................................................................................................75
8.6 PLL Signals.......................................................................................................76
8.7 TAP Signals ......................................................................................................76
8.8 Error and Thermal Protection ..............................................................................77
8.9 Power Sequencing.............................................................................................78
8.10 Processor Power and Ground Signals....................................................................78
8.11 Sense Pins .......................................................................................................79
8.12 Future Compatibility ..........................................................................................79
8.13 Processor Internal Pull Up/Pull Down....................................................................79