Datasheet

Power Management
Intel
®
Xeon
®
and Intel
®
Core™ Processors For Communications Infrastructure
Datasheet - Volume 1 of 2 May 2012
48 Document Number: 327405
-001
6.1 ACPI States Supported
The ACPI states supported by the processor are described in this section.
6.1.1 System States
6.1.2 Processor Core/Package Idle States
6.1.3 Integrated Memory Controller States
Table 6-1. System States
State Description
G0/S0 Full On
G1/S3-Cold
Suspend-to-RAM (STR). Context saved to memory (S3-Hot is not supported by the
processor).
G1/S4 Suspend-to-Disk (STD). All power lost (except wakeup on PCH).
G2/S5 Soft off. All power lost (except wakeup on PCH). Total reboot.
G3 Mechanical off. All power (AC and battery) removed from system.
Table 6-2. Processor Core/Package State Support
State Description
C0 Active mode, processor executing code.
C1 AutoHALT state.
C1E AutoHALT state with lowest frequency and voltage operating point.
C3
Execution cores in C3 flush their L1 instruction cache, L1 data cache, and L2 cache to
the L3 shared cache. Clocks are shut off to each core.
C6
Execution cores in this state save their architectural state before removing core
voltage.
Table 6-3. Integrated Memory Controller States
State Description
Power up CKE asserted. Active mode.
Pre-charge Power-down CKE deasserted (not self-refresh) with all banks closed.
Active Power-down CKE deasserted (not self-refresh) with minimum one bank active.
Self-Refresh CKE deasserted using device self-refresh.