Datasheet

Power Management

Intel

Xeon

and Intel

Core™ Processors For Communications Infrastructure

May 2012 Datasheet - Volume 1 of 2

Document Number: 327405

-001 47

6.0 Power Management

This chapter provides information on the following power management topics:

•ACPI States

• Processor Core

• Integrated Memory Controller (IMC)

• PCI Express*

• Direct Media Interface (DMI)

Figure 6-1. Power States

G0 – Working

S0 – CPU Fully powered on

C0 – Active mode

C1 – Auto halt

C1E – Auto halt, low freq, low voltage

C3 – L1/L2 caches flush, clocks off

C6 – save core states before shutdown

C7 – similar to C6, L3 flush

G1 – Sleeping

S3 cold – Sleep – Suspend To Ram (STR)

S4 – Hibernate – Suspend To Disk (STD),

Wakeup on PCH

S5 – Soft Off – no power,

Wakeup on PCH

G3 – Mechanical Off