Datasheet

Electrical Specifications
Intel
®
Xeon
®
and Intel
®
Core™ Processors For Communications Infrastructure
May 2012 Datasheet - Volume 1 of 2
Document Number: 327405
-001 117
§ §
Control Sideband and
TAP Signals groups
1.18*V
CCIO
37ns -0.27*V
CCIO
3ns 1,2
PCIe and DMI 1.2*V
CCIO
0.25UI -0.275*V
CCIO
0.25UI 1,2
Notes:
1. These specifications are measured at the processor pin.
2. See Figure 9-13 for description of allowable Overshoot/Undershoot magnitude and duration.
Figure 9-13. Maximum Acceptable Overshoot/Undershoot Waveform
Table 9-26. Processor Overshoot/Undershoot Specifications
Signal Group
Maximum
Overshoot
Overshoot
Duration
Minimum
Undershoot
Undershoot
Duration
Notes
Vss
Overshoot
Duration
Undershoot
Duration
Overshoot
Undershoot