Datasheet

Electrical Specifications
Intel
®
Xeon
®
and Intel
®
Core™ Processors For Communications Infrastructure
Datasheet - Volume 1 of 2 May 2012
100 Document Number: 327405
-001
9.10.2.2 PECI DC Characteristics
The PECI interface operates at a nominal voltage set by V
CCIO
. The set of DC electrical
specifications shown in Table 9-13 are used with devices normally operating from a
V
CCIO
interface supply. V
CCIO
nominal levels will vary between processor families. All
PECI devices will operate at the V
CCIO
level determined by the processor installed in the
system.
Figure 9-1. Example of PECI Host-Client Connection
Table 9-13. PECI DC Electrical Limits (Sheet 1 of 2)
Symbol Definition and Conditions Min Max Units Notes
1
Rup
Internal pull up resistance 15 45 Ohm 3
V
in
Input Voltage Range -0.15 V
CCIO
V
V
hysteresis
Hysteresis 0.1 * V
CCIO
N/A V
V
n
Negative-Edge Threshold Voltage 0.275 * V
CCIO
0.500 * V
CCIO
V
V
p
Positive-Edge Threshold Voltage 0.550 * V
CCIO
0.725 * V
CCIO
V
C
bus
Bus Capacitance per Node N/A 10 pF
C
pad
Pad Capacitance 0.7 1.8 pF
Ileak000 leakage current @ 0V - 0.6 mA
Ileak025 leakage current @ 0.25*V
CCIO
-0.4mA
Ileak050 leakage current @ 0.50*V
CCIO
-0.2mA