Datasheet

10 Intel
®
Xeon
®
Processor E7-8800/4800/2800 Product Families
September 2012 Specification Update
Specification Changes
Specification Clarifications
Document Changes
BP33 X No Fix Package C3/C6 with Memory Self-refresh Enabled May Cause False Error Logging
BP34 X No Fix Performance Monitor WOKEN Event May Under Count
BP35 X No Fix PECI Command Average Temperature Read does not report correct Temperature
BP36 X No Fix Intel
®
QPI Initialization May Cause a CATERR During Power-on Reset
BP37 X No Fix
EOI Transaction May Not be Sent if Software Enters Core C6 During an Interrupt Service
Routine
BP38 X No Fix A First Level Data Cache Parity Error May Result in Unexpected Behavior
BP39 X No Fix
An Unexpected Page Fault or EPT Violation May Occur After Another Logical Processor Creates a
Valid Translation for a Page
BP40 X No Fix A Page Fault May Not be Generated When the PS bit is set to “1” in a PML4E or PDPTE
BP41 X No Fix IO_SMI Indication in SMRAM State Save Area May be Set Incorrectly
BP42 X No Fix Writing an Illegal Vector to the IA32_X2APIC_SELF_IPI MSR Will Hang the Processor
BP43 X No Fix Successive Fixed Counter Overflows May be Discarded
BP44 X No Fix
VM Exits Due to “NMI-Window Exiting” May Not Occur Following a VM Entry to the Shutdown
State
BP45 X No Fix
Execution of INVVPID Outside 64-Bit Mode Cannot Invalidate Translations For 64-Bit Linear
Addresses
BP46 X No Fix
A Combination of Data Accesses That Are Split Across Cacheline Boundaries May Lead to a
Processor Hang
BP47 X No Fix A Load May Appear to be Ordered Before an Earlier Locked Instruction
BP48 X No Fix VMRESUME May Omit Check of Revision Identifier of Linked VMCS
BP49 X No Fix APIC Timer Interrupts May be Lost During Core C3
BP50 X No Fix MCI_ADDR May be Incorrect For Cache Parity Errors
Number SPECIFICATION CHANGES
None for this revision of this specification update.
Number SPECIFICATION CLARIFICATIONS
SC1
Package C3/C6 Memory Self-Refresh Error Handling
Number DOCUMENT CHANGES
None for this revision of this specification update.
Table 1. Errata Table (Sheet 2 of 2)
Number
Stepping
Status Description
A-2