Datasheet
Intel
®
Xeon
®
Processor C5500/C3500 Series
February 2010 Datasheet, Volume 1
Order Number: 323103-001 63
Interfaces
2.1.14.5.3 Virtual Temperature Counter
A counter will track the temperature above ambient of the hottest RAM in each rank.
On each DRAM cycle, it will be incremented to reflect heat produced by DRAM activity
and decremented to reflect cooling. This counter is saturating, it does not add when all
ones, nor does it subtract when all zeros.
2.1.14.5.4 Per Command Energy
On each DCLK, the virtual temperature counter is increased to model the heat
produced by the command issued in a previous DCLK. Eight-bit configurable values will
be provided for Read, Write, Activate, and Idle with CKE on and off. The energy for an
Activate-recharge cycle will be associated with the activate. Only common commands
are represented. Other commands should use the idle value with the appropriate CKE
state. Average refresh power should be included in the idle powers.
The per command energies are calculated from IDD values supplied by each DRAM
vendor. The BIOS can determine the values on the basis of SPD information.
2.1.14.5.5 Cooling Coefficient
Over a series of 8 DCLKs, a portion of the temperature will be subtracted to model heat
loss proportional to temperature. The portion is determined by a configurable cooling
coefficient that represents the thermal resistance and capacitance of the DIMM.
The cooling coefficient is an 8-bit constant. In order to avoid multiplication of the
current temperature and c in each cycle, the multiplication is done serially over 8
cycles. The following table describes how different amounts are subtracted on each of
the 8 iterations. After the 8th iteration, the sequence repeats.
Firmware or BIOS can modulate the MC_COOLING_COEF dynamically to reflect better
or worse system cooling capacity for memory. In case the fan controller is unable to
update the cooling coefficient due to corner conditions or failure, the Integrated
Memory Controller will load the SAFE_COOL_COEF value into the cooling coefficient if
MC_COOLING_COEF is not updated in 0.5 seconds.
A thermal control agent can modulate the cooling coefficient to minimize the error
between the virtual temperature and actual memory temperature. The agent must run
a control loop at least twice a second to avoid application of failsafe values by the
throttling logic. If it fails, throttling may occur due to conservative failsafe values and
some performance might be lost. The agent should monitor DIMM temperature, Cycles
Throttled and Virtual Temperature to minimize the difference between
DIMMtemp + DRAMdieToDIMMmargins - Ambient
and
VirtualTemp * (T64 - Ambient)/ThrottlePoint
2.1.14.5.6 Throttle Point
The throttle point is set by the ThrottleOffset parameter. When the virtual temperature
exceeds the throttling threshold, throttling is triggered. As an artifact of closed loop
throttling using DRAM die temperature sampling, the MSB of the virtual temperature is
compared to 0 and VT[36:29] are compared to the ThrottleOffset parameter. Since
Virtual Temperature cannot exceed the throttlepoint by very much before throttling is
triggered, the effective range of Virtual Temperature is only 37, not 38 bits. It is
recommended that Throttle Point be set to 255 for all usages.