Datasheet

Electrical Specifications
Intel
®
Xeon
®
Processor C5500/C3500 Series
Datasheet, Volume 1 January 2010
514 Order Number: 323103-001
13.6.10 Test Access Port (TAP) DC Specification
Table 174. Test Access Port (TAP) Signal Group DC Specification
13.6.11 Power Sequencing Signal DC Specification
Table 175. Power Sequencing Signal Group DC Specifications
1. Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2. The V
TTA
referred to in these specifications refers to instantaneous V
TTA
.
3. Based on a test load of 50 Ohms to V
TTA.
4. R
SYS_TERM
is the termination on the system and is not controlled by the Intel
®
Core
TM
i7 processor.
5. Applies to all signals, unless otherwise mentioned in Table 159.
6. Applies to PROCHOT# signal only. See Section 13.1.10.3.2 and Section 8.1 for information regarding
Power-On Configuration options.
7. This specification only applies to VCCPWRGOOD and VTTPWRGOOD.
8. This specification only applies to DDR_DRAMPWROK.
§ §
Symbol Parameter Min Typ Max Units Notes
1
V
IL
Input Low Voltage 0.40
*
V
TTA
V2,3
V
IH
Input High Voltage 0.60
*
V
TTA
V2
V
OL
Output Low Voltage
V
TTA
* R
ON
/
(R
ON
+ R
SYS_TERM
)
V2,4
V
OH
Output High Voltage V
TTA
V2
ODT On-Die Termination 45 55 5
R
ON
Buffer On Resistance 10 18 Ohms
Notes:
1. Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2. The V
TTA
referred to in these specifications refers to instantaneous V
TTA
.
3. Based on a test load of 50 Ohms to V
TTA.
4. R
SYS_TERM
is the termination on the system and is not controlled by the Intel
®
Xeon
®
processor
C5500/C3500 series.
5. Applies to all TAP signals, unless otherwise mentioned in Table 159.
Symbol Parameter Min Typ Max Units Notes
1
V
IL
Input Low Voltage 0.25
*
V
TTA
V2,3,7
V
IL
Input Low Voltage 0.29 V 8
V
IH
Input High Voltage 0.75
*
V
TTA
V2,7
V
IH
Input High Voltage 0.87 V 8
R
ON
Buffer On Resistance for
VID[7:0]
100 Ohms