Datasheet

Interfaces
Intel
®
Xeon
®
Processor C5500/C3500 Series
Datasheet, Volume 1 February 2010
46 Order Number: 323103-001
Note: ODT[5:4] is muxed with CS[7:6]#.
Note:
1. If DD3-1333 speed DIMM is populated, BIOS will configure it at DDR3-1066 speed.
Figure 7. DIMM Population Within a Channel
CLK:
Processor
D
I
M
M
1
4/5/6/7
2/3
D
I
M
M
2
P2/N2
2/3
4/5
Fill
Second
Fill
First
Chip Select:
ODT:
P1/N1
D
I
M
M
0
Fill
Third
0/1/2/3
0/1
P0/N0
1/30/2CKE: 0/2
Table 11. RDIMM Population Configurations Within a Channel for Three Slots per
Channel
Configuration
Number
POR Speed 1N or 2N DIMM2 DIMM1 DIMM0
1 DDR3-1333, 1066, & 800 1N Empty Empty Single-rank
2 DDR3-1333, 1066, & 800 1N Empty Empty Dual-rank
3 DDR3-1066
1
& 800 1N Empty Empty Quad-rank
4 DDR3-1066
1
& 800 1N Empty Single-rank Single-rank
5 DDR3-1066
1
& 800 1N Empty Single-rank Dual-rank
6 DDR3-1066
1
& 800 1N Empty Dual-rank Single-rank
7 DDR3-1066
1
& 800 1N Empty Dual-rank Dual-rank
8 DDR3-800 1N Empty Single-rank Quad-rank
9 DDR3-800 1N Empty Dual-rank Quad-rank
10 DDR3-800 1N Empty Quad-rank Quad-rank
11 DDR3-800 1N Single-rank Single-rank Single-rank
12 DDR3-800 1N Single-rank Single-rank Dual-rank
13 DDR3-800 1N Single-rank Dual-rank Single-rank
14 DDR3-800 1N Dual-rank Single-rank Single-rank
15 DDR3-800 1N Single-rank Dual-rank Dual-rank
16 DDR3-800 1N Dual-rank Single-rank Dual-rank
17 DDR3-800 1N Dual-rank Dual-rank Single-rank
18 DDR3-800 1N Dual-rank Dual-rank Dual-rank