Datasheet
Packaging and Signal Information
Intel
®
Xeon
®
Processor C5500/C3500 Series
Datasheet, Volume 1 February 2010
428 Order Number: 323103-001
Table 150. Physical Layout, Left Side (Sheet 1 of 3)
43 42 41 40 39 38 37 36 35 34 33 32 31 30 29
BA
KEY KEY KEY
RSVD
_BA4
0
VSS
PE_T
X_DP
[5]
PE_T
X_DN
[3]
PE_T
X_DP
[3]
DMI_
PE_C
FG#
KEY KEY KEY KEY VCC VSS
AY
KEY VSS
RSVD
_AY4
1
RSVD
_AY4
0
PE_T
X_DP
[6]
PE_T
X_DN
[5]
VSS
PE_T
X_DN
[2]
NC_A
Y35
PE_C
FG[2]
PE_C
FG[0]
VSS VCC VCC VSS
AW
KEY
RSVD
_AW
42
RSVD
_AW
41
PE_T
X_DP
[7]
PE_T
X_DN
[6]
PE_T
X_DN
[4]
PE_T
X_DP
[4]
PE_T
X_DP
[2]
VSS
NC_A
W34
DMI_
COM
P
VSS VCC VCC VSS
AV
RSVD
_AV4
3
RSVD
_AV4
2
VSS
PE_T
X_DN
[7]
VSS
PE_T
X_DP
[8]
PE_T
X_DN
[1]
PE_T
X_DP
[1]
VSS
PE_C
FG[1]
PE_G
EN2_
DISA
BLE#
VSS VCC VCC VSS
AU
VSS
RSVD
_AU4
2
PE_R
BIAS
VSS
PE_T
X_DP
[9]
PE_T
X_DN
[8]
RSVD
_AU3
7
VSS
PE_T
X_DN
[0]
QPI_
COM
P[1]
NC_A
U33
VSS VCC VCC VSS
AT
PE_T
X_DP
[10]
RSVD
_AT4
2
VSS
PE_C
LK_D
P
PE_T
X_DN
[9]
VSS VSS
DP_S
YNCR
ST#
PE_T
X_DP
[0]
VSS
PE_N
TBXL
VSS VCC VCC VSS
AR
PE_T
X_DN
[10]
PE_T
X_DN
[11]
PE_T
X_DP
[11]
PE_C
LK_D
N
VSS
PE_T
X_DP
[14]
RSVD
_AR3
7
SMB_
CLK
SMB_
DATA
RSVD
_AR3
4
VSS VSS VCC VCC VSS
AP
VSS
PE_T
X_DP
[12]
PE_T
X_DN
[13]
PE_T
X_DP
[13]
PE_T
X_DN
[15]
PE_T
X_DN
[14]
VSS
SYS_
ERR_
STAT
[1]#
RSVD
_AP3
5
PE_H
P_DA
TA
PE_H
P_CL
K
VSS VCC VCC VSS
AN
PE_I
COM
PI
PE_T
X_DN
[12]
VSS
RSVD
_AN4
0
PE_T
X_DP
[15]
RSVD
_AN3
8
PE_R
X_DN
[1]
PM_S
YNC
VSS VSS
RSVD
_AN3
3
VSS VCC VCC VSS
AM
PE_I
COM
PO
VSS
RSVD
_AM4
1
RSVD
_AM4
0
VSS
PE_R
X_DN
[2]
PE_R
X_DP
[1]
SKTO
CC#
SYS_
ERR_
STAT
[0]#
DDR_
ADR
EXTS
YSTR
G
VSS VCC VCC VSS
AL
PE_R
COM
PO
PE_R
X_DP
[6]
PE_R
X_DN
[4]
PE_R
X_DP
[4]
VSS
PE_R
X_DP
[2]
VSS
RSVD
_AL3
6
PROC
HOT
#
SYS_
ERR_
STAT
[2]#
TDO_
M
VSS VCC VCC VSS
AK
VSS
PE_R
X_DN
[6]
VSS
PE_R
X_DN
[5]
PE_R
X_DN
[0]
PE_R
X_DN
[3]
PE_R
X_DP
[3]
VSS
PECI
_ID#
VSS VCC VSS VCC VCC VSS
AJ
PE_R
X_DP
[9]
PE_R
X_DN
[7]
PE_R
X_DP
[7]
PE_R
X_DP
[5]
VSS
PE_R
X_DP
[0]
NC_A
J37
RSTI
N#
BCLK
_DN
VCC VCC
AH
PE_R
X_DN
[9]
VSS
PE_R
X_DP
[10]
VSS
PE_R
X_DP
[8]
VSS
VTTP
WRG
OOD
PECI
BCLK
_DP
VSS
TDI_
M
AG
PE_R
X_DP
[11]
PE_R
X_DN
[11]
PE_R
X_DN
[10]
PE_R
X_DP
[13]
PE_R
X_DN
[8]
VSS
THER
MTRI
P#
EKEY
_NC
VSS VTTA VSS
AF
VSS
PE_R
X_DP
[12]
PE_R
X_DN
[12]
PE_R
X_DN
[13]
VSS
PE_R
X_DP
[15]
VTTD VTTD VSS VTTA VTTA