Datasheet
Intel
®
Xeon
®
Processor C5500/C3500 Series
Datasheet, Volume 1 February 2010
4 Order Number: 323103-001
2.1.10.2 Second Level Address Translation..............................................54
2.1.11 Address Translations...............................................................................55
2.1.11.1 Translating System Address to Channel Address..........................55
2.1.11.2 Translating Channel Address to Rank Address .............................56
2.1.11.3 Low Order Address Bit Mapping.................................................56
2.1.11.4 Supported Configurations .........................................................58
2.1.12 DDR Protocol Support..............................................................................58
2.1.13 Refresh .................................................................................................58
2.1.13.1 DRAM Driver Impedance Calibration...........................................58
2.1.14 Power Management.................................................................................59
2.1.14.1 Interface to Uncore Power Manager ...........................................59
2.1.14.2 DRAM Power Down States ........................................................59
2.1.14.3 Dynamic DRAM Interface Power Savings Features........................60
2.1.14.4 Static DRAM Interface Power Savings Features............................61
2.1.14.5 DRAM Temperature Throttling...................................................61
2.1.14.6 Closed Loop Thermal Throttling (CLTT).......................................64
2.1.14.7 Advanced Throttling Options .....................................................65
2.1.14.8 2X Refresh .............................................................................65
2.1.14.9 Demand Observation ...............................................................66
2.1.14.10 Rank Sharing..........................................................................67
2.1.14.11 Registers................................................................................67
2.2 Platform Environment Control Interface (PECI) ......................................................69
2.2.1 PECI Client Capabilities............................................................................70
2.2.1.1 Thermal Management ..............................................................70
2.2.1.2 Platform Manageability.............................................................71
2.2.1.3 Processor Interface Tuning and Diagnostics.................................71
2.2.2 Client Command Suite.............................................................................71
2.2.2.1 Ping()....................................................................................71
2.2.2.2 GetDIB()................................................................................72
2.2.2.3 GetTemp() .............................................................................73
2.2.2.4 PCIConfigRd().........................................................................74
2.2.2.5 PCIConfigWr().........................................................................76
2.2.2.6 Mailbox..................................................................................77
2.2.2.7 MbxSend() .............................................................................82
2.2.2.8 MbxGet() ...............................................................................84
2.2.2.9 Mailbox Usage Definition ..........................................................85
2.2.3 Multi-Domain Commands.........................................................................86
2.2.4 Client Responses ....................................................................................87
2.2.4.1 Abort FCS...............................................................................87
2.2.4.2 Completion Codes....................................................................87
2.2.5 Originator Responses ..............................................................................88
2.2.6 Temperature Data ..................................................................................89
2.2.6.1 Format...................................................................................89
2.2.6.2 Interpretation .........................................................................89
2.2.6.3 Temperature Filtering...............................................................89
2.2.6.4 Reserved Values......................................................................89
2.2.7 Client Management.................................................................................90
2.2.7.1 Power-up Sequencing ..............................................................90
2.2.7.2 Device Discovery.....................................................................91
2.2.7.3 Client Addressing ....................................................................91
2.2.7.4 C-States.................................................................................91
2.2.7.5 S-States.................................................................................91
2.2.7.6 Processor Reset.......................................................................92
2.3 SMBus..............................................................................................................92
2.3.1 Slave SMBus..........................................................................................92
2.3.2 Master SMBus ........................................................................................93
2.3.3 SMBus Physical Layer..............................................................................93
2.3.4 SMBus Supported Transactions.................................................................93