Datasheet

Intel
®
Xeon
®
Processor C5500/C3500 Series
February 2010 Datasheet, Volume 1
Order Number: 323103-001 393
Reliability, Availability, Serviceability (RAS)
to the IIO error severity and reports it to the global error status register. PCIe errors can be classified
as two types: Uncorrectable errors and Correctable errors. Uncorrectable errors can further be
classified as Fatal or Non-Fatal. This classification is compatible and mapped with the IIO’s error
classification: Correctable as Correctable, Non-Fatal as Recoverable, and Fatal as Fatal.
11.5.3.2 Unsupported Transactions and Unexpected Completions
If the IIO receives a legal PCIe-defined packet that is not included in PCIe supported transactions,
then the IIO treats that packet as an unsupported transaction and follows the PCIe rules for handling
unsupported requests. If the IIO receives a completion with a requester ID set to the root port
requester ID and there is no matching request outstanding, then this is considered an “Unexpected
Completion”. Also, the IIO detects malformed packets from PCI Express and reports them as errors
per the PCI Express specification rules.
If the IIO receives a Type 0 Intel-Vendor_Defined message that terminates at the root complex and
that it does not recognize as a valid Intel-supported message, then the message is handled by the IIO
as an Unsupported Request with appropriate error escalation, as defined in PCI Express specification.
For Type 1 Vendor_Defined messages which terminate at the root complex, the IIO discards the
message with no further action.
11.5.3.3 Error Forwarding
PCIe has a concept called Error Forwarding or Data Poisoning that allows a PCIe device to forward
data errors across the interface without it being interpreted as an error originating on that interface.
The IIO forwards the poison bit from the Intel
®
QuickPath Interconnect to PCIe and vice-versa, and
also between PCI Express ports on peer-to-peer. Poisoning is accomplished by setting the EP bit in the
PCIe TLP header.
11.5.3.4 Unconnected Ports
If a transaction targets a PCIe link that is not connected to any device or the link is down (DL_Down
status), then the IIO treats that as a master abort situation. This is required for PCI bus scans to non-
existent devices to go through without creating other side effects. If the transaction is non-posted,
then the IIO synthesizes an Unsupported Request response status back to any PCIe requester
targeting the down link or returns all Fs on reads and a successful completion on writes to any Intel
®
QuickPath Interconnect requester targeting the down link. Software accesses to the root port
registers corresponding to a down PCIe interface does not generate an error.
11.6 IIO Errors Handling Summary
The following tables provide a summary of the errors that are monitored by the IIO. The IIO provides
a flexible mechanism for error reporting. Software can arbitrarily assign an error to an error severity
and associate the error severity with a system event. Depending on which error severity is assigned
by software, the error is logged either in fatal or non-fatal error log registers. Each error severity can
be mapped to one of the inband report mechanism as shown in Table 128, or generate no inband
message at all. In addition, each severity can enable/disable the assertion of its associated error pin
for outband error report (e.g. severity 0 error triggers Error[0], severity 1 triggers Error[1],..., etc.).
Table 128 shows the default error severity mapping in the IIO and how each error severity is
reported. Table 129 summarizes the default logging and responses on the IIO-detected errors.
Note: Each error’s severity, and therefore which error registers log the error, is programmable
and therefore, the error logging registers used for the error could be different from
those indicated in Table 129.