Datasheet

Power Management
Intel
®
Xeon
®
Processor C5500/C3500 Series
Datasheet, Volume 1 February 2010
354 Order Number: 323103-001
• Because there is low transition latency between P-states, a significant number of
transitions per second are possible.
• The highest frequency/voltage operating point is known as the highest frequency
mode (HFM).
• The lowest frequency/voltage operating point is known as the lowest frequency
mode (LFM).
8.2.2 Low-Power Idle States
When the processor is idle, low-power idle states (C-states) are used to save power.
More power savings actions are taken for numerically higher C-states. However, higher
C-states have longer exit and entry latencies. Resolution of C-states occur at the
thread, processor core, and processor package level. Thread-level C-states are
available if Hyper-Threading Technology is enabled.
Figure 68. Idle Power Management Breakdown of the Processor Cores (Two-Core
Example)
Processor Package State
Core 1 State
Thread 1Thread 0
Core 0 State
Thread 1Thread 0