Datasheet

Features Summary
Intel
®
Xeon
®
Processor C5500/C3500 Series
Datasheet, Volume 1 February 2010
32 Order Number: 323103-001
1.8 Terminology
Table 2. Terminology (Sheet 1 of 2)
Term Description
BLT Block Level Transfer
CRC Cyclic Redundency Code
DCA Direct Cache Access
DDR3 Third generation Double Data Rate SDRAM memory technology
DMA Direct Memory Access
DMI Direct Media Interface
DP Dual processor
DTS Digital Thermal Sensor
ECC Error Correction Code
Enhanced Intel
SpeedStep
®
Technology
Technology that provides power management capabilities
Execute Disable Bit
The Execute Disable bit allows memory to be marked as executable or non-
executable, when combined with a supporting operating system. If code
attempts to run in non-executable memory the processor raises an error to the
operating system. This feature can prevent some classes of viruses or worms
that exploit buffer overrun vulnerabilities and can thus help improve the overall
security of the system. See the Intel
®
64 and IA-32 Architectures Software
Developer's Manuals for more detailed information.
EU Execution Unit
FCLGA Flip Chip Land Grid Array
Flit
(G)MCH Legacy component - Graphics Memory Controller Hub
ICH
The legacy I/O Controller Hub component that contains the main PCI interface,
LPC interface, USB2, Serial ATA, and other I/O functions. It communicates with
the legacy (G)MCH over a proprietary interconnect called DMI.
IIO Integrated Input/Output (IOH module integrated into the processor)
IMC Integrated Memory Controller
Intel
®
64 Technology 64-bit memory extensions to the IA-32 architecture
Intel
®
Core
TM
i7 Intel’s 45nm processor design, follow-on to the 45nm Penryn design
Intel
®
TXT Intel
®
Trusted Execution Technology
Intel
®
VT-d2
Intel
®
Virtualization Technology (Intel
®
VT) for Directed I/O. Intel
®
VT-d is a
hardware assist, under system software (Virtual Machine Manager or OS)
control, for enabling I/O device virtualization. VT-d also brings robust security by
providing protection from errant DMAs by using DMA remapping, a key feature of
VT-d.
Intel
®
Virtualization
Technology
Processor virtualization which when used in conjunction with Virtual Machine
Monitor software enables multiple, robust independent software environments
inside a single platform.
INTx An interrupt request signal where X stands for interrupts A,B,C or D.
IOV I/O Virtualization
LLC Last Level Cache. The shared cache amongst all processor execution cores.
MCP Multi-Chip Package
MLC Mid-Level Cache
P2P Peer-To-Peer, usually used to refer to Peer-To-Peer traffic flows