Datasheet

Features Summary
Intel
®
Xeon
®
Processor C5500/C3500 Series
Datasheet, Volume 1 February 2010
30 Order Number: 323103-001
Does not support dynamic lane reversal.
Supports Half Swing “low-power/low-voltage” mode.
Message Signaled Interrupt (MSI and MSI-X) messages.
Polarity inversion.
1.4.4 Direct Media Interface (DMI)
Compliant to Direct Media Interface Second Generation (DMI2).
Four lanes in each direction.
2.5 GT/s point-to-point DMI2 interface to PCH is supported.
Uses the 100-MHz PCI Express reference clock (supplied through PCH).
64-bit downstream host address format. However, since the processor’s
addressiblity is limited to 40 bits (1 TB), bits 63:40 will always be set to zeros.
64-bit upstream host address format. However, since the processor’s addressibility
is limited to 40 bits (1 TB) it responds to upstream read transactions with an
Unsupported Request response for addresses above 1 TB. Upstream write
transactions to host addresses beyond 1 TB will be dropped.
APIC and MSI interrupt messaging support:
Message Signaled Interrupt (MSI and MSI-X) messages.
Virtual Legacy Wire (VLW) Messasage Support allows commuicating status of
A20M#, INTR, SM#, INIT#, and NMI as messages, thereby eliminating the need for
these sideband signals.
Downstream SMI, SCI and SERR error indication.
Legacy support for ISA regime protocol (PHOLD/PHOLDA) required for parallel port
DMA, floppy drive, and LPC bus masters.
Support for both AC (capacitors between the processor and PCH) & DC (no
capacitors between the processor and PCH) coupling.
Polarity inversion.
PCH end-to-end lane reversal across the link.
Supports Half Swing “low-power/low-voltage” and Full Swing “high-power/high-
voltage” modes.
In DP configurations, the unused DMI port can be configured as a Gen1, x4 or x1,
non-bifurcatable, PCI Express port.
1.4.5 Platform Environment Control Interface (PECI)
The PECI is a one-wire interface that provides a communication channel between
processor and a PECI master, usually the PCH.
1.4.6 SMBus
The Intel
®
Xeon
®
processor C5500/C3500 series supports a 2-pin SMBus slave for
accessing the on-die system management registers. There is also a 2-pin SMBus
master to support PCI Express hot plug.