Datasheet
Intel
®
Xeon
®
Processor C5500/C3500 Series
February 2010 Datasheet, Volume 1
Order Number: 323103-001 285
PCI Express Non-Transparent Bridge
3.21.1.8 SBAR4XLAT: Secondary BAR 4/5 Translate
This register contains a value used to direct accesses into the memory located on the
Primary side of the NTB made from the Secondary side of the NTB through the window
claimed by BAR 4/5 on the secondary side. The register contains the base address of
the Primary side memory window.
Note: NTB will translate full 64b range. Switch logic will perform address range checks for
both normal and VT-d flows.
3.21.1.9 SBAR0BASE: Secondary BAR 0/1 Base Address
This register is mirrored from the BAR 0/1 register pair in the Configuration Space of
the Secondary side of the NTB. The register is used by the processor on the primary
side of the NTB to examine and load the BAR 0/1 register pair on the Secondary side of
the NTB.
Register:SBAR4XLAT
Bar:PB01BASE, SB01BASE
Offset:38h
Bit Attr Default Description
63:nn RWL 00h
Secondary BAR 4/5Translate
The aligned base address into Primary side memory.
Note: Primary side access will appear as RW to SW. Secondary side access
will appear as RO
(nn-
1) :
12
RWL 00h
Reserved
Reserved bits dictated by the size of the memory claimed by the BAR.
Set by Section 3.20.2.13, “SB45BASE: Secondary BAR 4/5 Base Address”
Note: Attr will appear as RO to SW
11:00 RO variable
Reserved
Reserved bits dictated by the size of the memory claimed by the BAR.
Set by Section 3.20.2.13, “SB45BASE: Secondary BAR 4/5 Base Address”
Note: Attr will appear as RO to SW
Register:SBAR0BASE
Bar:PB01BASE, SB01BASE
Offset:40h
Bit Attr Default Description
63:15 RW 00h
Secondary BAR 0/1 Base
This register is reflected into the BAR 0/1 register pair in the Configuration
Space of the Secondary side of the NTB.
14:04 RO 00h
Reserved
Fixed size of 32K B.
03 RWO 1b
Prefetchable
1 = BAR points to Prefetchable memory (default)
0 = BAR points to Non-Prefetchable memory
02:01 RO 10b
Type
Memory type claimed by BAR 0/1 is 64-bit addressable.
00 RO 0b
Memory Space Indicator
BAR resource is memory (as opposed to I/O).