Datasheet

PCI Express Non-Transparent Bridge
Intel
®
Xeon
®
Processor C5500/C3500 Series
Datasheet, Volume 1 February 2010
226 Order Number: 323103-001
4RWO 0h
Power Indicator Present
This bit indicates that a Power Indicator is implemented for this slot and is
electrically controlled by the chassis.
0: indicates that a Power Indicator that is electrically controlled by the chassis
is not present
1: indicates that Power Indicator that is electrically controlled by the chassis is
present
BIOS programs this field with a 1 for CEM/SIOM FFs and a 0 for Express cable.
3RWO 0h
Attention Indicator Present
This bit indicates that an Attention Indicator is implemented for this slot and is
electrically controlled by the chassis
0: indicates that an Attention Indicator that is electrically controlled by the
chassis is not present
1: indicates that an Attention Indicator that is electrically controlled by the
chassis is present
BIOS programs this field with a 1 for CEM/SIOM FFs.
2RWO 0h
MRL Sensor Present
This bit indicates that an MRL Sensor is implemented on the chassis for this
slot.
0: indicates that an MRL Sensor is not present
1: indicates that an MRL Sensor is present
BIOS programs this field with a 0 for SIOM/Express cable and with either 0 or
1 for CEM depending on system design.
1RWO 0h
Power Controller Present
This bit indicates that a software controllable power controller is implemented
on the chassis for this slot.
0: indicates that a software controllable power controller is not present
1: indicates that a software controllable power controller is present
BIOS programs this field with a 1 for CEM/SIOM FFs and a 0 for Express cable.
0RWO 0h
Attention Button Present
This bit indicates that the Attention Button event signal is routed (from slot or
on-board in the chassis) to the IIOs hotplug controller.
0: indicates that an Attention Button signal is routed to IIO
1: indicates that an Attention Button is not routed to IIO
BIOS programs this field with a 1 for CEM/SIOM FFs.
Register:SLTCAP
Bus:0
Device:3
Function:0
Offset:1A4h
Bit Attr Default Description