Datasheet

Intel
®
Xeon
®
Processor C5500/C3500 Series
February 2010 Datasheet, Volume 1
Order Number: 323103-001 217
PCI Express Non-Transparent Bridge
3.19.4.21 PCIE_IOU0_BIF_CTRL: PCIE IOU0 Bifurcation Control Register
BDF 030 Offset 190H. This register exist in both RP and NTB modes. It is documented
in RP Section 3.4.5.21, “PCIE_IOU0_BIF_CTRL: PCIE IOU0 Bifurcation Control
Register” in Volume 2 of the Datasheet.
3.19.4.22 NTBDEVCAP: PCI Express Device Capabilities Register
The PCI Express Device Capabilities register identifies device specific information for
the device.
Register:NTBDEVCAP
Bus:0
Device:3
Function:0
Offset:194h
Bit Attr Default Description
31:29 RsvdP 0h
Reserved
28 RO 0b
Function Level Reset Capability
A value of 1b indicates the Function supports the optional Function Level Reset
mechanism.
NTB does not support this functionality.
27:26 RO 0h
Captured Slot Power Limit Scale
Does not apply to RPs or integrated devices
This value is hardwired to 00h
NTB is required to be able to receive the Set_Slot_Power_Limit message
without error but simply discard the Message value.
Note: PCI Express Base Specification, Revision 2.0 states Components with
Endpoint, Switch, or PCI Express-PCI Bridge Functions that are
targeted for integration on an adapter where total consumed power is
below the lowest limit defined for the targeted form factor are
permitted to ignore Set_Slot_Power_Limit Messages, and to return a
value of 0 in the Captured Slot Power Limit Value and Scale fields of
the Device Capabilities register
25:18 RO 00h
Captured Slot Power Limit Value
Does not apply to RPs or integrated devices
This value is hardwired to 00h
NTB is required to be able to receive the Set_Slot_Power_Limit message
without error but simply discard the Message value.
Note: PCI Express Base Specification, Revision 2.0 states components with
Endpoint, Switch, or PCI Express-PCI Bridge Functions that are
targeted for integration on an adapter where total consumed power is
below the lowest limit defined for the targeted form factor are
permitted to ignore Set_Slot_Power_Limit Messages, and to return a
value of 0 in the Captured Slot Power Limit Value and Scale fields of
the Device Capabilities register
17:16 RsvdP 0h Reserved
15 RO 1
Role Based Error Reporting: IIO is 1.1 compliant and so supports this
feature
14 RO 0
Power Indicator Present on Device
Does not apply to RPs or integrated devices
13 RO 0
Attention Indicator Present
Does not apply to RPs or integrated devices
12 RO 0
Attention Button Present
Does not apply to RPs or integrated devices