Datasheet

PCI Express Non-Transparent Bridge
Intel
®
Xeon
®
Processor C5500/C3500 Series
Datasheet, Volume 1 February 2010
194 Order Number: 323103-001
3.19.3.13 PXPCAPID: PCI Express Capability Identity Register
The PCI Express Capability List register enumerates the PCI Express Capability
structure in the PCI 3.0 configuration space.
3.19.3.14 PXPNXTPTR: PCI Express Next Pointer Register
The PCI Express Capability List register enumerates the PCI Express Capability
structure in the PCI 3.0 configuration space.
Register:PXPCAPID
Bus:0
Device:3
Function:0
Offset:90h
Bit Attr Default Description
7:0 RO 10h
Capability ID
Provides the PCI Express capability ID assigned by PCI-SIG.
Required by PCI Express Base Specification, Revision 2.0 to be this value.
Register:PXPNXTPTR
Bus:0
Device:3
Function:0
Offset:91h
Bit Attr Default Description
7:0 RWO E0h
Next Ptr
This field is set to the PCI PM capability.