Datasheet
Intel
®
Xeon
®
Processor C5500/C3500 Series
February 2010 Datasheet, Volume 1
Order Number: 323103-001 159
PCI Express Non-Transparent Bridge
3.7.2 Inbound PCI Express Messages Supported
Table 82 lists all inbound messages that Intel
®
Xeon
®
processor C5500/C3500 series
supports receiving on a PCI Express NTB secondary side. In a given system
configuration, certain messages are not applicable being received inbound on a PCI
Express port. They will be called out as appropriate.
3.7.2.1 Error Reporting
PCI Express NTB reports many error conditions on the primary side of the NTB through
explicit error messages: ERR_COR, ERR_NONFATAL, ERR_FATAL. Intel
®
Xeon
®
processor C5500/C3500 series can be programmed to do one of the following when it
receives one of these error messages:
• Generate MSI,MSI-X
• Forward the messages to PCH
See the PCI Express Base Specification, Revision 2.0 for details of the standard status
bits that are set when a root port receives one of these messages.
The NTB does not report any error message towards the link partner on the secondary
side of the NTB.
Table 82. Incoming PCI Express Message Cycles
PCI Express
Transaction
Address Space or
Message
IIO Response
Inbound
Message
Unlock
Silently dropped by NTB.
Note: PCI Express-compliant software drivers and applications must be written to
prevent the use of lock semantics when accessing NTB. Because the unlock
message could still be received by NTB because the RP or NTB on other side
could be ‘broadcasting’ unlock to all ports when a lock sequence to a device
(that is NOT connected to JSP) in the remote system completes.
EOI (Intel
®
VDM)
Silently dropped by NTB.
Note: This message could be received from remote RP or NTB that is broadcasting
this message and all receivers are supposed to ignore it.
PME_Turn_Off
The PME_turn_Off message is initiated by the remote host that is connected to the
secondary side of the NTB in preparation for removing power on the remote host.
Note: This only applies to NTB/RP case. The NTB/NTB case is defined by
PME_Turn_Off defined in Table 84.
NTB will receive and acknowledge this message with PME_TO_ACK
PM_REQUEST_ACK
(DLLP)
After the NTB sends a PM_Enter_L1 to the remote host, the remote host then blocks
subsequent TLP issue and wait for all pending TLPs to Ack. The remote host will then
send a PM_REQUEST_ACK back to the NTB. This message is continuously issued until
the receiver link is idle. See the PCI Express Base Specification, Revision 2.0 for details.
Note: PM_REQUEST_ACK DLLP is an inbound packet in the case of NTB/RP. For NTB/
NTB this message will be seen as an outbound message from the USD NTB and
an inbound message on the DSD NTB.
PM_Active_State_Nak
When secondary side of the NTB receives a PM_Active_State_Request_L1 from the link
partner and due to a temporary condition, it cannot transition to L1, it responds with
PM_Active_State_Nak.
Set_Slot_Power_Limit
Message that is sent to PCI Express device when software wrote to the Slot Capabilities
Register or the PCI Express link transitions to DL_Up state. See the PCI Express Base
Specification, Revision 2.0 for more details.
All Other Messages
Silently discard if message type is type 1 and drop and log error if message type is
type 0