Datasheet

Intel
®
Xeon
®
Processor C5500/C3500 Series
February 2010 Datasheet, Volume 1
Order Number: 323103-001 125
Interfaces
2.6.7 Inbound Transactions
Inbound refers to the direction towards main memory from I/O.
2.6.7.1 Inbound PCI Express Messages Supported
Table 70 lists all inbound messages that may be received on a PCI Express downstream
port (does not include DMI messages). In a given system configuration, certain
messages are not applicable being received inbound on a PCI Express port. They will be
called out as appropriate.
Table 70. Incoming PCI Express Message Cycles
PCI Express
Transaction
Address Space or
Message
IIO Response
Inbound Message
ASSERT_INTA
DEASSERT_INTA
ASSERT_INTB
DEASSERT_INTB
ASSERT_INTC
DEASSERT_INTC
ASSERT_INTD
DEASSERT_INTD
Inband interrupt assertion/deassertion emulating PCI
interrupts. Forward to DMI.
ERR_COR
ERR_NONFATAL
ERR_FATAL
PCI Express error messages Propagate as an interrupt
to system.
PM_PME
Propagate as an interrupt/general purpose event to
the system.
PME_TO_ACK
Received PME_TO_ACK bit is set when IIO receives
this message.
PM_ENTER_L1
(DLLP)
Block subsequent TLP issue and wait for all pending
TLPs to Ack. Then, send PM_REQUEST_ACK. See PCI
Express Base Specification, Revision 2.0 for details of
the L1 entry flow.
ATC Invalidation
Complete
When an end point device completes a ATC
invalidation, it will send an Invalidate Complete
message to the IIO (RC). This message will be tagged
with information from the Invalidate message so that
the IIO can associate the Invalidate Complete with
the Invalidate Request.
Vendor-defined
ASSERT_GPE
DEASSERT_GPE
(Intel-specific)
Vendor-specific message indicating assertion/
deassertion of PCI-X hotplug event in PXH. Message
forwarded to DMI port.
MCTP
Management Control Transport Protocol messages -
forwards MCTP messages received on its PCI-E ports
to PCH over DMI interface.
All Other Messages
Silently discard if message type is type 1 and drop
and log error if message type is type 0