Datasheet

Interfaces
Intel
®
Xeon
®
Processor C5500/C3500 Series
Datasheet, Volume 1 February 2010
104 Order Number: 323103-001
2.3.9.6 SMBus Configuration and Memory Word Writes
2.3.9.7 SMBus Configuration and Memory Byte Writes
Figure 39. SMBus Word-Size Configuration Register Write
S 1110_1X0 W A Cmd = 10011001 A Bus Num A Dev / Func A PEC A P
S 1110_1X0 W A Cmd = 00011001 A
S 1110_1X0 W A Cmd = 00011001 A
S 1110_1X0 W A Cmd = 01011001 A
Rsv[3:0] & Addr[11:8] A
Data [15:8]
Data [31:24] A
A
Data [23:16] A PEC A P
Data [7:0] A PEC A P
Regoff [7:0] A PEC A P
Figure 40. SMBus Word-Size Memory Register Write
Figure 41. SMBus Configuration (Byte Write, PEC enabled)
S 1110_1X0 W A Cmd = 10111001 A Mem Region A Addr [23:16] A PEC A P
S 1110_1X0 W A Cmd = 00111001 A
S 1110_1X0 W A Cmd = 00111001 A
S 1110_1X0 W A Cmd = 01111001 A
Addr [15:8] A
Data [15:8]
Data [31:24] A
A
Data [23:16] A PEC A P
Data [7:0] A PEC A P
Addr [7:0] A PEC A P
S 1110_1X0 W A Cmd = 10010100 A Bus Num A PEC A P
S 1110_1X0 W A Cmd = 00010100 A
S 1110_1X0 W A Cmd = 00010100 A Rsv[3:0] & Addr[11:8] A
S 1110_1X0 W A Cmd = 00010100 A
S 1110_1X0 W A Cmd = 00010100 A
S 1110_1X0 W A Cmd = 00010100 A
Dev / Func A PEC A P
PEC A P
Regoff [7:0] A PEC A P
Data [31:24] A
Data [23:16] A
S 1110_1X0 W A Cmd = 00010100 A
S 1110_1X0 W A Cmd = 01010100 A
Data [15:8] A
PEC A P
Data [7:0]
PEC A P
A
PEC A P
PEC A P